#include <string.h>
#include "util/macros.h"
-#include "glsl/nir/nir.h"
+#include "compiler/nir/nir.h"
#include "util/list.h"
#include "util/u_math.h"
+#include "vc4_screen.h"
+#include "vc4_qpu_defines.h"
+#include "kernel/vc4_packet.h"
+#include "pipe/p_state.h"
+
+struct nir_builder;
+
enum qfile {
QFILE_NULL,
QFILE_TEMP,
QFILE_VARY,
QFILE_UNIF,
QFILE_VPM,
+ QFILE_TLB_COLOR_WRITE,
+ QFILE_TLB_COLOR_WRITE_MS,
+ QFILE_TLB_Z_WRITE,
+ QFILE_TLB_STENCIL_SETUP,
+
+ /* Payload registers that aren't in the physical register file, so we
+ * can just use the corresponding qpu_reg at qpu_emit time.
+ */
+ QFILE_FRAG_X,
+ QFILE_FRAG_Y,
+ QFILE_FRAG_REV_FLAG,
/**
* Stores an immediate value in the index field that can be turned
struct qreg {
enum qfile file;
uint32_t index;
+ int pack;
};
+static inline struct qreg qir_reg(enum qfile file, uint32_t index)
+{
+ return (struct qreg){file, index};
+}
+
enum qop {
QOP_UNDEF,
QOP_MOV,
+ QOP_FMOV,
+ QOP_MMOV,
QOP_FADD,
QOP_FSUB,
QOP_FMUL,
+ QOP_V8MULD,
+ QOP_V8MIN,
+ QOP_V8MAX,
+ QOP_V8ADDS,
+ QOP_V8SUBS,
QOP_MUL24,
QOP_FMIN,
QOP_FMAX,
QOP_XOR,
QOP_NOT,
- /* Note: Orderings of these compares must be the same as in
- * qpu_defines.h. Selects the src[0] if the ns flag bit is set,
- * otherwise 0. */
- QOP_SEL_X_0_ZS,
- QOP_SEL_X_0_ZC,
- QOP_SEL_X_0_NS,
- QOP_SEL_X_0_NC,
- /* Selects the src[0] if the ns flag bit is set, otherwise src[1]. */
- QOP_SEL_X_Y_ZS,
- QOP_SEL_X_Y_ZC,
- QOP_SEL_X_Y_NS,
- QOP_SEL_X_Y_NC,
-
QOP_FTOI,
QOP_ITOF,
QOP_RCP,
QOP_LOG2,
QOP_VW_SETUP,
QOP_VR_SETUP,
- QOP_PACK_SCALED,
- QOP_PACK_8888_F,
- QOP_PACK_8A_F,
- QOP_PACK_8B_F,
- QOP_PACK_8C_F,
- QOP_PACK_8D_F,
- QOP_TLB_DISCARD_SETUP,
- QOP_TLB_STENCIL_SETUP,
- QOP_TLB_Z_WRITE,
- QOP_TLB_COLOR_WRITE,
QOP_TLB_COLOR_READ,
+ QOP_MS_MASK,
QOP_VARY_ADD_C,
- QOP_FRAG_X,
- QOP_FRAG_Y,
QOP_FRAG_Z,
QOP_FRAG_W,
- QOP_FRAG_REV_FLAG,
-
- QOP_UNPACK_8A_F,
- QOP_UNPACK_8B_F,
- QOP_UNPACK_8C_F,
- QOP_UNPACK_8D_F,
- QOP_UNPACK_16A_F,
- QOP_UNPACK_16B_F,
-
- QOP_UNPACK_8A_I,
- QOP_UNPACK_8B_I,
- QOP_UNPACK_8C_I,
- QOP_UNPACK_8D_I,
- QOP_UNPACK_16A_I,
- QOP_UNPACK_16B_I,
/** Texture x coordinate parameter write */
QOP_TEX_S,
* the destination
*/
QOP_TEX_RESULT,
- QOP_R4_UNPACK_A,
- QOP_R4_UNPACK_B,
- QOP_R4_UNPACK_C,
- QOP_R4_UNPACK_D
};
struct queued_qpu_inst {
struct qreg dst;
struct qreg *src;
bool sf;
+ uint8_t cond;
};
enum qstage {
/** A reference to a texture config parameter 2 cubemap stride uniform */
QUNIFORM_TEXTURE_CONFIG_P2,
+ QUNIFORM_TEXTURE_MSAA_ADDR,
+
QUNIFORM_UBO_ADDR,
QUNIFORM_TEXRECT_SCALE_X,
QUNIFORM_TEXTURE_BORDER_COLOR,
- QUNIFORM_BLEND_CONST_COLOR,
+ QUNIFORM_BLEND_CONST_COLOR_X,
+ QUNIFORM_BLEND_CONST_COLOR_Y,
+ QUNIFORM_BLEND_CONST_COLOR_Z,
+ QUNIFORM_BLEND_CONST_COLOR_W,
+ QUNIFORM_BLEND_CONST_COLOR_RGBA,
+ QUNIFORM_BLEND_CONST_COLOR_AAAA,
+
QUNIFORM_STENCIL,
QUNIFORM_ALPHA_REF,
+ QUNIFORM_SAMPLE_MASK,
};
-struct vc4_varying_semantic {
- uint8_t semantic;
- uint8_t index;
+struct vc4_varying_slot {
+ uint8_t slot;
uint8_t swizzle;
};
bool used;
};
+struct vc4_key {
+ struct vc4_uncompiled_shader *shader_state;
+ struct {
+ enum pipe_format format;
+ uint8_t swizzle[4];
+ union {
+ struct {
+ unsigned compare_mode:1;
+ unsigned compare_func:3;
+ unsigned wrap_s:3;
+ unsigned wrap_t:3;
+ };
+ struct {
+ uint16_t msaa_width, msaa_height;
+ };
+ };
+ } tex[VC4_MAX_TEXTURE_SAMPLERS];
+ uint8_t ucp_enables;
+};
+
+struct vc4_fs_key {
+ struct vc4_key base;
+ enum pipe_format color_format;
+ bool depth_enabled;
+ bool stencil_enabled;
+ bool stencil_twoside;
+ bool stencil_full_writemasks;
+ bool is_points;
+ bool is_lines;
+ bool alpha_test;
+ bool point_coord_upper_left;
+ bool light_twoside;
+ bool msaa;
+ bool sample_coverage;
+ bool sample_alpha_to_coverage;
+ bool sample_alpha_to_one;
+ uint8_t alpha_test_func;
+ uint8_t logicop_func;
+ uint32_t point_sprite_mask;
+
+ struct pipe_rt_blend_state blend;
+};
+
+struct vc4_vs_key {
+ struct vc4_key base;
+
+ /**
+ * This is a proxy for the array of FS input semantics, which is
+ * larger than we would want to put in the key.
+ */
+ uint64_t compiled_fs_id;
+
+ enum pipe_format attr_formats[8];
+ bool is_coord;
+ bool per_vertex_point_size;
+};
+
struct vc4_compile {
struct vc4_context *vc4;
nir_shader *s;
*/
struct qreg *inputs;
struct qreg *outputs;
+ bool msaa_per_sample_output;
+ struct qreg color_reads[VC4_MAX_SAMPLES];
+ struct qreg sample_colors[VC4_MAX_SAMPLES];
uint32_t inputs_array_size;
uint32_t outputs_array_size;
uint32_t uniforms_array_size;
uint8_t vattr_sizes[8];
+ /* Bitfield for whether a given channel of a sampler needs sRGB
+ * decode.
+ */
+ uint8_t tex_srgb_decode[VC4_MAX_TEXTURE_SAMPLERS];
+
/**
- * Array of the TGSI semantics of all FS QFILE_VARY reads.
+ * Array of the VARYING_SLOT_* of all FS QFILE_VARY reads.
*
* This includes those that aren't part of the VPM varyings, like
* point/line coordinates.
*/
- struct vc4_varying_semantic *input_semantics;
- uint32_t num_input_semantics;
- uint32_t input_semantics_array_size;
+ struct vc4_varying_slot *input_slots;
+ uint32_t num_input_slots;
+ uint32_t input_slots_array_size;
/**
- * An entry per outputs[] in the VS indicating what the semantic of
- * the output is. Used to emit from the VS in the order that the FS
- * needs.
+ * An entry per outputs[] in the VS indicating what the VARYING_SLOT_*
+ * of the output is. Used to emit from the VS in the order that the
+ * FS needs.
*/
- struct vc4_varying_semantic *output_semantics;
+ struct vc4_varying_slot *output_slots;
struct pipe_shader_state *shader_state;
struct vc4_key *key;
uint32_t num_outputs;
uint32_t num_texture_samples;
uint32_t output_position_index;
- uint32_t output_clipvertex_index;
uint32_t output_color_index;
uint32_t output_point_size_index;
+ uint32_t output_sample_mask_index;
struct qreg undef;
enum qstage stage;
uint32_t variant_id;
};
+/* Special nir_load_input intrinsic index for loading the current TLB
+ * destination color.
+ */
+#define VC4_NIR_TLB_COLOR_READ_INPUT 2000000000
+
+#define VC4_NIR_MS_MASK_OUTPUT 2000000000
+
+/* Special offset for nir_load_uniform values to get a QUNIFORM_*
+ * state-dependent value.
+ */
+#define VC4_NIR_STATE_UNIFORM_OFFSET 1000000000
+
struct vc4_compile *qir_compile_init(void);
void qir_compile_destroy(struct vc4_compile *c);
struct qinst *qir_inst(enum qop op, struct qreg dst,
struct qreg qir_uniform(struct vc4_compile *c,
enum quniform_contents contents,
uint32_t data);
+void qir_schedule_instructions(struct vc4_compile *c);
void qir_reorder_uniforms(struct vc4_compile *c);
+
void qir_emit(struct vc4_compile *c, struct qinst *inst);
+static inline struct qinst *
+qir_emit_nodef(struct vc4_compile *c, struct qinst *inst)
+{
+ list_addtail(&inst->link, &c->instructions);
+ return inst;
+}
+
struct qreg qir_get_temp(struct vc4_compile *c);
int qir_get_op_nsrc(enum qop qop);
bool qir_reg_equals(struct qreg a, struct qreg b);
bool qir_has_side_effects(struct vc4_compile *c, struct qinst *inst);
bool qir_has_side_effect_reads(struct vc4_compile *c, struct qinst *inst);
-bool qir_is_multi_instruction(struct qinst *inst);
+bool qir_is_mul(struct qinst *inst);
+bool qir_is_raw_mov(struct qinst *inst);
bool qir_is_tex(struct qinst *inst);
+bool qir_is_float_input(struct qinst *inst);
bool qir_depends_on_flags(struct qinst *inst);
bool qir_writes_r4(struct qinst *inst);
-bool qir_reads_r4(struct qinst *inst);
-bool qir_src_needs_a_file(struct qinst *inst);
struct qreg qir_follow_movs(struct vc4_compile *c, struct qreg reg);
void qir_dump(struct vc4_compile *c);
bool qir_opt_cse(struct vc4_compile *c);
bool qir_opt_dead_code(struct vc4_compile *c);
bool qir_opt_small_immediates(struct vc4_compile *c);
-bool qir_opt_vpm_writes(struct vc4_compile *c);
+bool qir_opt_vpm(struct vc4_compile *c);
+void vc4_nir_lower_blend(nir_shader *s, struct vc4_compile *c);
+void vc4_nir_lower_io(nir_shader *s, struct vc4_compile *c);
+nir_ssa_def *vc4_nir_get_state_uniform(struct nir_builder *b,
+ enum quniform_contents contents);
+nir_ssa_def *vc4_nir_get_swizzled_channel(struct nir_builder *b,
+ nir_ssa_def **srcs, int swiz);
+void vc4_nir_lower_txf_ms(nir_shader *s, struct vc4_compile *c);
void qir_lower_uniforms(struct vc4_compile *c);
-void qpu_schedule_instructions(struct vc4_compile *c);
+uint32_t qpu_schedule_instructions(struct vc4_compile *c);
void qir_SF(struct vc4_compile *c, struct qreg src);
struct qreg t = qir_get_temp(c); \
qir_emit(c, qir_inst(QOP_##name, t, a, c->undef)); \
return t; \
+} \
+static inline struct qinst * \
+qir_##name##_dest(struct vc4_compile *c, struct qreg dest, \
+ struct qreg a) \
+{ \
+ return qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, \
+ c->undef)); \
}
#define QIR_ALU2(name) \
struct qreg t = qir_get_temp(c); \
qir_emit(c, qir_inst(QOP_##name, t, a, b)); \
return t; \
+} \
+static inline void \
+qir_##name##_dest(struct vc4_compile *c, struct qreg dest, \
+ struct qreg a, struct qreg b) \
+{ \
+ qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, b)); \
}
#define QIR_NODST_1(name) \
-static inline void \
+static inline struct qinst * \
qir_##name(struct vc4_compile *c, struct qreg a) \
{ \
- qir_emit(c, qir_inst(QOP_##name, c->undef, a, c->undef)); \
+ struct qinst *inst = qir_inst(QOP_##name, c->undef, \
+ a, c->undef); \
+ qir_emit(c, inst); \
+ return inst; \
}
#define QIR_NODST_2(name) \
-static inline void \
+static inline struct qinst * \
qir_##name(struct vc4_compile *c, struct qreg a, struct qreg b) \
{ \
- qir_emit(c, qir_inst(QOP_##name, c->undef, a, b)); \
+ struct qinst *inst = qir_inst(QOP_##name, c->undef, \
+ a, b); \
+ qir_emit(c, inst); \
+ return inst; \
+}
+
+#define QIR_PACK(name) \
+static inline struct qreg \
+qir_##name(struct vc4_compile *c, struct qreg dest, struct qreg a) \
+{ \
+ qir_emit_nodef(c, qir_inst(QOP_##name, dest, a, c->undef)); \
+ return dest; \
}
QIR_ALU1(MOV)
+QIR_ALU1(FMOV)
+QIR_ALU1(MMOV)
QIR_ALU2(FADD)
QIR_ALU2(FSUB)
QIR_ALU2(FMUL)
+QIR_ALU2(V8MULD)
+QIR_ALU2(V8MIN)
+QIR_ALU2(V8MAX)
+QIR_ALU2(V8ADDS)
+QIR_ALU2(V8SUBS)
QIR_ALU2(MUL24)
-QIR_ALU1(SEL_X_0_ZS)
-QIR_ALU1(SEL_X_0_ZC)
-QIR_ALU1(SEL_X_0_NS)
-QIR_ALU1(SEL_X_0_NC)
-QIR_ALU2(SEL_X_Y_ZS)
-QIR_ALU2(SEL_X_Y_ZC)
-QIR_ALU2(SEL_X_Y_NS)
-QIR_ALU2(SEL_X_Y_NC)
QIR_ALU2(FMIN)
QIR_ALU2(FMAX)
QIR_ALU2(FMINABS)
QIR_ALU1(RSQ)
QIR_ALU1(EXP2)
QIR_ALU1(LOG2)
-QIR_ALU2(PACK_SCALED)
-QIR_ALU1(PACK_8888_F)
-QIR_ALU2(PACK_8A_F)
-QIR_ALU2(PACK_8B_F)
-QIR_ALU2(PACK_8C_F)
-QIR_ALU2(PACK_8D_F)
QIR_ALU1(VARY_ADD_C)
QIR_NODST_2(TEX_S)
QIR_NODST_2(TEX_T)
QIR_NODST_2(TEX_R)
QIR_NODST_2(TEX_B)
QIR_NODST_2(TEX_DIRECT)
-QIR_ALU0(FRAG_X)
-QIR_ALU0(FRAG_Y)
QIR_ALU0(FRAG_Z)
QIR_ALU0(FRAG_W)
-QIR_ALU0(FRAG_REV_FLAG)
QIR_ALU0(TEX_RESULT)
QIR_ALU0(TLB_COLOR_READ)
-QIR_NODST_1(TLB_Z_WRITE)
-QIR_NODST_1(TLB_DISCARD_SETUP)
-QIR_NODST_1(TLB_STENCIL_SETUP)
-
-static inline struct qreg
-qir_R4_UNPACK(struct vc4_compile *c, struct qreg r4, int i)
-{
- struct qreg t = qir_get_temp(c);
- qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, r4, c->undef));
- return t;
-}
+QIR_NODST_1(MS_MASK)
static inline struct qreg
-qir_SEL_X_0_COND(struct vc4_compile *c, int i)
+qir_SEL(struct vc4_compile *c, uint8_t cond, struct qreg src0, struct qreg src1)
{
struct qreg t = qir_get_temp(c);
- qir_emit(c, qir_inst(QOP_R4_UNPACK_A + i, t, c->undef, c->undef));
+ struct qinst *a = qir_MOV_dest(c, t, src0);
+ struct qinst *b = qir_MOV_dest(c, t, src1);
+ a->cond = cond;
+ b->cond = cond ^ 1;
return t;
}
static inline struct qreg
qir_UNPACK_8_F(struct vc4_compile *c, struct qreg src, int i)
{
- struct qreg t = qir_get_temp(c);
- qir_emit(c, qir_inst(QOP_UNPACK_8A_F + i, t, src, c->undef));
+ struct qreg t = qir_FMOV(c, src);
+ c->defs[t.index]->src[0].pack = QPU_UNPACK_8A + i;
return t;
}
static inline struct qreg
qir_UNPACK_8_I(struct vc4_compile *c, struct qreg src, int i)
{
- struct qreg t = qir_get_temp(c);
- qir_emit(c, qir_inst(QOP_UNPACK_8A_I + i, t, src, c->undef));
+ struct qreg t = qir_MOV(c, src);
+ c->defs[t.index]->src[0].pack = QPU_UNPACK_8A + i;
return t;
}
static inline struct qreg
qir_UNPACK_16_F(struct vc4_compile *c, struct qreg src, int i)
{
- struct qreg t = qir_get_temp(c);
- qir_emit(c, qir_inst(QOP_UNPACK_16A_F + i, t, src, c->undef));
+ struct qreg t = qir_FMOV(c, src);
+ c->defs[t.index]->src[0].pack = QPU_UNPACK_16A + i;
return t;
}
static inline struct qreg
qir_UNPACK_16_I(struct vc4_compile *c, struct qreg src, int i)
{
- struct qreg t = qir_get_temp(c);
- qir_emit(c, qir_inst(QOP_UNPACK_16A_I + i, t, src, c->undef));
+ struct qreg t = qir_MOV(c, src);
+ c->defs[t.index]->src[0].pack = QPU_UNPACK_16A + i;
return t;
}
+static inline void
+qir_PACK_8_F(struct vc4_compile *c, struct qreg dest, struct qreg val, int chan)
+{
+ assert(!dest.pack);
+ dest.pack = QPU_PACK_MUL_8A + chan;
+ qir_emit(c, qir_inst(QOP_MMOV, dest, val, c->undef));
+ if (dest.file == QFILE_TEMP)
+ c->defs[dest.index] = NULL;
+}
+
static inline struct qreg
-qir_PACK_8_F(struct vc4_compile *c, struct qreg rest, struct qreg val, int chan)
+qir_PACK_8888_F(struct vc4_compile *c, struct qreg val)
{
- struct qreg t = qir_get_temp(c);
- qir_emit(c, qir_inst(QOP_PACK_8A_F + chan, t, rest, val));
- return t;
+ struct qreg dest = qir_MMOV(c, val);
+ c->defs[dest.index]->dst.pack = QPU_PACK_MUL_8888;
+ return dest;
}
static inline struct qreg
static inline void
qir_VPM_WRITE(struct vc4_compile *c, struct qreg val)
{
- static const struct qreg vpm = { QFILE_VPM, 0 };
- qir_emit(c, qir_inst(QOP_MOV, vpm, val, c->undef));
+ qir_MOV_dest(c, qir_reg(QFILE_VPM, 0), val);
}
#endif /* VC4_QIR_H */
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