vc4: Fix mixup of return type in reloc_tex().

[mesa.git] / src / gallium / drivers / vc4 / vc4_qpu.c

diff --git a/src/gallium/drivers/vc4/vc4_qpu.c b/src/gallium/drivers/vc4/vc4_qpu.c
index 27fc309df81064c7be5b16f74b280795b648b88f..a551a0fa1871b68cefc5ef69cc6104918a89651e 100644 (file)
--- a/src/gallium/drivers/vc4/vc4_qpu.c
+++ b/src/gallium/drivers/vc4/vc4_qpu.c
@@ -28,18 +28,17 @@ static uint64_t
 set_src_raddr(uint64_t inst, struct qpu_reg src)
 {
         if (src.mux == QPU_MUX_A) {
-                /* These asserts could be better, checking to be sure we're
-                 * not overwriting an actual use of a raddr of 0.
-                 */
-                assert(QPU_GET_FIELD(inst, QPU_RADDR_A) == 0 ||
+                assert(QPU_GET_FIELD(inst, QPU_RADDR_A) == QPU_R_NOP ||
                        QPU_GET_FIELD(inst, QPU_RADDR_A) == src.addr);
-                return inst | QPU_SET_FIELD(src.addr, QPU_RADDR_A);
+                return ((inst & ~QPU_RADDR_A_MASK) |
+                        QPU_SET_FIELD(src.addr, QPU_RADDR_A));
         }
 
         if (src.mux == QPU_MUX_B) {
-                assert(QPU_GET_FIELD(inst, QPU_RADDR_B) == 0 ||
+                assert(QPU_GET_FIELD(inst, QPU_RADDR_B) == QPU_R_NOP ||
                        QPU_GET_FIELD(inst, QPU_RADDR_B) == src.addr);
-                return inst | QPU_SET_FIELD(src.addr, QPU_RADDR_B);
+                return ((inst & ~QPU_RADDR_B_MASK) |
+                        QPU_SET_FIELD(src.addr, QPU_RADDR_B));
         }
 
         return inst;
@@ -56,6 +55,8 @@ qpu_NOP()
         /* Note: These field values are actually non-zero */
         inst |= QPU_SET_FIELD(QPU_W_NOP, QPU_WADDR_ADD);
         inst |= QPU_SET_FIELD(QPU_W_NOP, QPU_WADDR_MUL);
+        inst |= QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_A);
+        inst |= QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_B);
         inst |= QPU_SET_FIELD(QPU_SIG_NONE, QPU_SIG);
 
         return inst;
@@ -101,11 +102,13 @@ qpu_a_MOV(struct qpu_reg dst, struct qpu_reg src)
         uint64_t inst = 0;
 
         inst |= QPU_SET_FIELD(QPU_A_OR, QPU_OP_ADD);
+        inst |= QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_A);
+        inst |= QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_B);
         inst |= qpu_a_dst(dst);
         inst |= QPU_SET_FIELD(QPU_COND_ALWAYS, QPU_COND_ADD);
         inst |= QPU_SET_FIELD(src.mux, QPU_ADD_A);
         inst |= QPU_SET_FIELD(src.mux, QPU_ADD_B);
-        inst |= set_src_raddr(inst, src);
+        inst = set_src_raddr(inst, src);
         inst |= QPU_SET_FIELD(QPU_SIG_NONE, QPU_SIG);
         inst |= QPU_SET_FIELD(QPU_W_NOP, QPU_WADDR_MUL);
 
@@ -118,11 +121,13 @@ qpu_m_MOV(struct qpu_reg dst, struct qpu_reg src)
         uint64_t inst = 0;
 
         inst |= QPU_SET_FIELD(QPU_M_V8MIN, QPU_OP_MUL);
+        inst |= QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_A);
+        inst |= QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_B);
         inst |= qpu_m_dst(dst);
         inst |= QPU_SET_FIELD(QPU_COND_ALWAYS, QPU_COND_MUL);
         inst |= QPU_SET_FIELD(src.mux, QPU_MUL_A);
         inst |= QPU_SET_FIELD(src.mux, QPU_MUL_B);
-        inst |= set_src_raddr(inst, src);
+        inst = set_src_raddr(inst, src);
         inst |= QPU_SET_FIELD(QPU_SIG_NONE, QPU_SIG);
         inst |= QPU_SET_FIELD(QPU_W_NOP, QPU_WADDR_ADD);
 
@@ -151,12 +156,14 @@ qpu_a_alu2(enum qpu_op_add op,
         uint64_t inst = 0;
 
         inst |= QPU_SET_FIELD(op, QPU_OP_ADD);
+        inst |= QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_A);
+        inst |= QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_B);
         inst |= qpu_a_dst(dst);
         inst |= QPU_SET_FIELD(QPU_COND_ALWAYS, QPU_COND_ADD);
         inst |= QPU_SET_FIELD(src0.mux, QPU_ADD_A);
-        inst |= set_src_raddr(inst, src0);
+        inst = set_src_raddr(inst, src0);
         inst |= QPU_SET_FIELD(src1.mux, QPU_ADD_B);
-        inst |= set_src_raddr(inst, src1);
+        inst = set_src_raddr(inst, src1);
         inst |= QPU_SET_FIELD(QPU_SIG_NONE, QPU_SIG);
         inst |= QPU_SET_FIELD(QPU_W_NOP, QPU_WADDR_MUL);
 
@@ -169,16 +176,15 @@ qpu_m_alu2(enum qpu_op_mul op,
 {
         uint64_t inst = 0;
 
-        set_src_raddr(inst, src0);
-        set_src_raddr(inst, src1);
-
         inst |= QPU_SET_FIELD(op, QPU_OP_MUL);
+        inst |= QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_A);
+        inst |= QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_B);
         inst |= qpu_m_dst(dst);
         inst |= QPU_SET_FIELD(QPU_COND_ALWAYS, QPU_COND_MUL);
         inst |= QPU_SET_FIELD(src0.mux, QPU_MUL_A);
-        inst |= set_src_raddr(inst, src0);
+        inst = set_src_raddr(inst, src0);
         inst |= QPU_SET_FIELD(src1.mux, QPU_MUL_B);
-        inst |= set_src_raddr(inst, src1);
+        inst = set_src_raddr(inst, src1);
         inst |= QPU_SET_FIELD(QPU_SIG_NONE, QPU_SIG);
         inst |= QPU_SET_FIELD(QPU_W_NOP, QPU_WADDR_ADD);
 
@@ -209,6 +215,11 @@ qpu_inst(uint64_t add, uint64_t mul)
         merge = merge_fields(merge, add, mul, QPU_SIG_MASK,
                              QPU_SET_FIELD(QPU_SIG_NONE, QPU_SIG));
 
+        merge = merge_fields(merge, add, mul, QPU_RADDR_A_MASK,
+                             QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_A));
+        merge = merge_fields(merge, add, mul, QPU_RADDR_B_MASK,
+                             QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_B));
+
         return merge;
 }