vc4: Reuse list_for_each_entry_rev().

[mesa.git] / src / gallium / drivers / vc4 / vc4_qpu.h

diff --git a/src/gallium/drivers/vc4/vc4_qpu.h b/src/gallium/drivers/vc4/vc4_qpu.h
index 866ca5c1300256e28286ff0f3941474ed1f6d5dc..5ec80f0537522c87a9ecc86ab01d00f8b320c1ee 100644 (file)
--- a/src/gallium/drivers/vc4/vc4_qpu.h
+++ b/src/gallium/drivers/vc4/vc4_qpu.h
@@ -116,6 +116,17 @@ qpu_tlbc()
         return r;
 }
 
+static inline struct qpu_reg
+qpu_tlbc_ms()
+{
+        struct qpu_reg r = {
+                QPU_MUX_A,
+                QPU_W_TLB_COLOR_MS,
+        };
+
+        return r;
+}
+
 static inline struct qpu_reg qpu_r0(void) { return qpu_rn(0); }
 static inline struct qpu_reg qpu_r1(void) { return qpu_rn(1); }
 static inline struct qpu_reg qpu_r2(void) { return qpu_rn(2); }
@@ -132,16 +143,26 @@ uint64_t qpu_m_alu2(enum qpu_op_mul op, struct qpu_reg dst,
                     struct qpu_reg src0, struct qpu_reg src1) ATTRIBUTE_CONST;
 uint64_t qpu_merge_inst(uint64_t a, uint64_t b) ATTRIBUTE_CONST;
 uint64_t qpu_load_imm_ui(struct qpu_reg dst, uint32_t val) ATTRIBUTE_CONST;
+uint64_t qpu_load_imm_u2(struct qpu_reg dst, uint32_t val) ATTRIBUTE_CONST;
+uint64_t qpu_load_imm_i2(struct qpu_reg dst, uint32_t val) ATTRIBUTE_CONST;
+uint64_t qpu_branch(uint32_t cond, uint32_t target) ATTRIBUTE_CONST;
 uint64_t qpu_set_sig(uint64_t inst, uint32_t sig) ATTRIBUTE_CONST;
 uint64_t qpu_set_cond_add(uint64_t inst, uint32_t cond) ATTRIBUTE_CONST;
 uint64_t qpu_set_cond_mul(uint64_t inst, uint32_t cond) ATTRIBUTE_CONST;
 uint32_t qpu_encode_small_immediate(uint32_t i) ATTRIBUTE_CONST;
+uint64_t qpu_m_rot(struct qpu_reg dst, struct qpu_reg src, int rot) ATTRIBUTE_CONST;
 
 bool qpu_waddr_is_tlb(uint32_t waddr) ATTRIBUTE_CONST;
 bool qpu_inst_is_tlb(uint64_t inst) ATTRIBUTE_CONST;
 int qpu_num_sf_accesses(uint64_t inst) ATTRIBUTE_CONST;
 void qpu_serialize_one_inst(struct vc4_compile *c, uint64_t inst);
 
+static inline enum qpu_cond
+qpu_cond_complement(enum qpu_cond cond)
+{
+        return cond ^ 1;
+}
+
 static inline uint64_t
 qpu_load_imm_f(struct qpu_reg dst, float val)
 {
@@ -218,4 +239,10 @@ vc4_qpu_disasm_unpack(FILE *out, uint32_t pack);
 void
 vc4_qpu_validate(uint64_t *insts, uint32_t num_inst);
 
+void
+vc4_qpu_disasm_cond(FILE *out, uint32_t cond);
+
+void
+vc4_qpu_disasm_cond_branch(FILE *out, uint32_t cond);
+
 #endif /* VC4_QPU_H */