#include "util/u_surface.h"
#include "util/u_upload_mgr.h"
+#include "drm_fourcc.h"
+#include "vc4_drm.h"
#include "vc4_screen.h"
#include "vc4_context.h"
#include "vc4_resource.h"
#include "vc4_tiling.h"
-static bool miptree_debug = false;
+#ifndef DRM_FORMAT_MOD_INVALID
+#define DRM_FORMAT_MOD_INVALID ((1ULL << 56) - 1)
+#endif
static bool
vc4_resource_bo_alloc(struct vc4_resource *rsc)
{
- struct pipe_resource *prsc = &rsc->base.b;
+ struct pipe_resource *prsc = &rsc->base;
struct pipe_screen *pscreen = prsc->screen;
struct vc4_bo *bo;
- if (miptree_debug) {
+ if (vc4_debug & VC4_DEBUG_SURFACE) {
fprintf(stderr, "alloc %p: size %d + offset %d -> %d\n",
rsc,
rsc->slices[0].size,
prsc->width0 == box->width &&
prsc->height0 == box->height &&
prsc->depth0 == box->depth &&
- prsc->array_size == 1) {
+ prsc->array_size == 1 &&
+ rsc->bo->private) {
usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
}
ptrans->box.z = 0;
}
- /* Note that the current kernel implementation is synchronous, so no
- * need to do syncing stuff here yet.
- */
-
if (usage & PIPE_TRANSFER_UNSYNCHRONIZED)
buf = vc4_bo_map_unsynchronized(rsc->bo);
else
if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
return NULL;
+ if (format == PIPE_FORMAT_ETC1_RGB8) {
+ /* ETC1 is arranged as 64-bit blocks, where each block
+ * is 4x4 pixels. Texture tiling operates on the
+ * 64-bit block the way it would an uncompressed
+ * pixels.
+ */
+ assert(!(ptrans->box.x & 3));
+ assert(!(ptrans->box.y & 3));
+ ptrans->box.x >>= 2;
+ ptrans->box.y >>= 2;
+ ptrans->box.width = (ptrans->box.width + 3) >> 2;
+ ptrans->box.height = (ptrans->box.height + 3) >> 2;
+ }
+
/* We need to align the box to utile boundaries, since that's
* what load/store operates on. This may cause us to need to
* read out the original contents in that border area. Right
vc4_resource_destroy(struct pipe_screen *pscreen,
struct pipe_resource *prsc)
{
+ struct vc4_screen *screen = vc4_screen(pscreen);
struct vc4_resource *rsc = vc4_resource(prsc);
pipe_resource_reference(&rsc->shadow_parent, NULL);
vc4_bo_unreference(&rsc->bo);
+
+ if (rsc->scanout)
+ renderonly_scanout_destroy(rsc->scanout, screen->ro);
+
free(rsc);
}
static boolean
vc4_resource_get_handle(struct pipe_screen *pscreen,
+ struct pipe_context *pctx,
struct pipe_resource *prsc,
- struct winsys_handle *handle)
+ struct winsys_handle *whandle,
+ unsigned usage)
{
+ struct vc4_screen *screen = vc4_screen(pscreen);
struct vc4_resource *rsc = vc4_resource(prsc);
- return vc4_screen_bo_get_handle(pscreen, rsc->bo, rsc->slices[0].stride,
- handle);
-}
+ whandle->stride = rsc->slices[0].stride;
+ whandle->offset = 0;
+
+ /* If we're passing some reference to our BO out to some other part of
+ * the system, then we can't do any optimizations about only us being
+ * the ones seeing it (like BO caching or shadow update avoidance).
+ */
+ rsc->bo->private = false;
+
+ if (rsc->tiled)
+ whandle->modifier = DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED;
+ else
+ whandle->modifier = DRM_FORMAT_MOD_LINEAR;
+
+ switch (whandle->type) {
+ case DRM_API_HANDLE_TYPE_SHARED:
+ if (screen->ro) {
+ /* This could probably be supported, assuming that a
+ * control node was used for pl111.
+ */
+ fprintf(stderr, "flink unsupported with pl111\n");
+ return FALSE;
+ }
-static const struct u_resource_vtbl vc4_resource_vtbl = {
- .resource_get_handle = vc4_resource_get_handle,
- .resource_destroy = vc4_resource_destroy,
- .transfer_map = vc4_resource_transfer_map,
- .transfer_flush_region = u_default_transfer_flush_region,
- .transfer_unmap = vc4_resource_transfer_unmap,
-};
+ return vc4_bo_flink(rsc->bo, &whandle->handle);
+ case DRM_API_HANDLE_TYPE_KMS:
+ if (screen->ro && renderonly_get_handle(rsc->scanout, whandle))
+ return TRUE;
+ whandle->handle = rsc->bo->handle;
+ return TRUE;
+ case DRM_API_HANDLE_TYPE_FD:
+ /* FDs are cross-device, so we can export directly from vc4.
+ */
+ whandle->handle = vc4_bo_get_dmabuf(rsc->bo);
+ return whandle->handle != -1;
+ }
+
+ return FALSE;
+}
static void
-vc4_setup_slices(struct vc4_resource *rsc)
+vc4_setup_slices(struct vc4_resource *rsc, const char *caller)
{
- struct pipe_resource *prsc = &rsc->base.b;
+ struct pipe_resource *prsc = &rsc->base;
uint32_t width = prsc->width0;
uint32_t height = prsc->height0;
+ if (prsc->format == PIPE_FORMAT_ETC1_RGB8) {
+ width = (width + 3) >> 2;
+ height = (height + 3) >> 2;
+ }
+
uint32_t pot_width = util_next_power_of_two(width);
uint32_t pot_height = util_next_power_of_two(height);
uint32_t offset = 0;
offset += slice->size;
- if (miptree_debug) {
+ if (vc4_debug & VC4_DEBUG_SURFACE) {
static const char tiling_chars[] = {
[VC4_TILING_FORMAT_LINEAR] = 'R',
[VC4_TILING_FORMAT_LT] = 'L',
[VC4_TILING_FORMAT_T] = 'T'
};
fprintf(stderr,
- "rsc setup %p (format %s: vc4 %d), %dx%d: "
+ "rsc %s %p (format %s: vc4 %d), %dx%d: "
"level %d (%c) -> %dx%d, stride %d@0x%08x\n",
- rsc,
+ caller, rsc,
util_format_short_name(prsc->format),
rsc->vc4_format,
prsc->width0, prsc->height0,
struct vc4_resource *rsc = CALLOC_STRUCT(vc4_resource);
if (!rsc)
return NULL;
- struct pipe_resource *prsc = &rsc->base.b;
+ struct pipe_resource *prsc = &rsc->base;
*prsc = *tmpl;
pipe_reference_init(&prsc->reference, 1);
prsc->screen = pscreen;
- rsc->base.vtbl = &vc4_resource_vtbl;
if (prsc->nr_samples <= 1)
rsc->cpp = util_format_get_blocksize(tmpl->format);
else
return format;
}
-struct pipe_resource *
-vc4_resource_create(struct pipe_screen *pscreen,
- const struct pipe_resource *tmpl)
+static bool
+find_modifier(uint64_t needle, const uint64_t *haystack, int count)
{
+ int i;
+
+ for (i = 0; i < count; i++) {
+ if (haystack[i] == needle)
+ return true;
+ }
+
+ return false;
+}
+
+static struct pipe_resource *
+vc4_resource_create_with_modifiers(struct pipe_screen *pscreen,
+ const struct pipe_resource *tmpl,
+ const uint64_t *modifiers,
+ int count)
+{
+ struct vc4_screen *screen = vc4_screen(pscreen);
struct vc4_resource *rsc = vc4_resource_setup(pscreen, tmpl);
- struct pipe_resource *prsc = &rsc->base.b;
+ struct pipe_resource *prsc = &rsc->base;
+ bool linear_ok = find_modifier(DRM_FORMAT_MOD_LINEAR, modifiers, count);
+ /* Use a tiled layout if we can, for better 3D performance. */
+ bool should_tile = true;
+
+ /* VBOs/PBOs are untiled (and 1 height). */
+ if (tmpl->target == PIPE_BUFFER)
+ should_tile = false;
+
+ /* MSAA buffers are linear. */
+ if (tmpl->nr_samples > 1)
+ should_tile = false;
+
+ /* No tiling when we're sharing with another device (pl111). */
+ if (screen->ro && (tmpl->bind & PIPE_BIND_SCANOUT))
+ should_tile = false;
+
+ /* Cursors are always linear, and the user can request linear as well.
+ */
+ if (tmpl->bind & (PIPE_BIND_LINEAR | PIPE_BIND_CURSOR))
+ should_tile = false;
+
+ /* No shared objects with LT format -- the kernel only has T-format
+ * metadata. LT objects are small enough it's not worth the trouble to
+ * give them metadata to tile.
+ */
+ if ((tmpl->bind & (PIPE_BIND_SHARED | PIPE_BIND_SCANOUT)) &&
+ vc4_size_is_lt(prsc->width0, prsc->height0, rsc->cpp))
+ should_tile = false;
- /* We have to make shared be untiled, since we don't have any way to
- * communicate metadata about tiling currently.
+ /* If we're sharing or scanning out, we need the ioctl present to
+ * inform the kernel or the other side.
*/
- if (tmpl->target == PIPE_BUFFER ||
- tmpl->nr_samples > 1 ||
- (tmpl->bind & (PIPE_BIND_SCANOUT |
- PIPE_BIND_LINEAR |
- PIPE_BIND_SHARED |
- PIPE_BIND_CURSOR))) {
+ if ((tmpl->bind & (PIPE_BIND_SHARED |
+ PIPE_BIND_SCANOUT)) && !screen->has_tiling_ioctl)
+ should_tile = false;
+
+ /* No user-specified modifier; determine our own. */
+ if (count == 1 && modifiers[0] == DRM_FORMAT_MOD_INVALID) {
+ linear_ok = true;
+ rsc->tiled = should_tile;
+ } else if (should_tile &&
+ find_modifier(DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED,
+ modifiers, count)) {
+ rsc->tiled = true;
+ } else if (linear_ok) {
rsc->tiled = false;
} else {
- rsc->tiled = true;
+ fprintf(stderr, "Unsupported modifier requested\n");
+ return NULL;
}
if (tmpl->target != PIPE_BUFFER)
rsc->vc4_format = get_resource_texture_format(prsc);
- vc4_setup_slices(rsc);
+ vc4_setup_slices(rsc, "create");
if (!vc4_resource_bo_alloc(rsc))
goto fail;
+ if (screen->has_tiling_ioctl) {
+ uint64_t modifier;
+ if (rsc->tiled)
+ modifier = DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED;
+ else
+ modifier = DRM_FORMAT_MOD_LINEAR;
+ struct drm_vc4_set_tiling set_tiling = {
+ .handle = rsc->bo->handle,
+ .modifier = modifier,
+ };
+ int ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_SET_TILING,
+ &set_tiling);
+ if (ret != 0)
+ goto fail;
+ }
+
+ if (screen->ro && tmpl->bind & PIPE_BIND_SCANOUT) {
+ rsc->scanout =
+ renderonly_scanout_for_resource(prsc, screen->ro, NULL);
+ if (!rsc->scanout)
+ goto fail;
+ }
+
return prsc;
fail:
vc4_resource_destroy(pscreen, prsc);
return NULL;
}
+struct pipe_resource *
+vc4_resource_create(struct pipe_screen *pscreen,
+ const struct pipe_resource *tmpl)
+{
+ const uint64_t mod = DRM_FORMAT_MOD_INVALID;
+ return vc4_resource_create_with_modifiers(pscreen, tmpl, &mod, 1);
+}
+
static struct pipe_resource *
vc4_resource_from_handle(struct pipe_screen *pscreen,
const struct pipe_resource *tmpl,
- struct winsys_handle *handle,
+ struct winsys_handle *whandle,
unsigned usage)
{
+ struct vc4_screen *screen = vc4_screen(pscreen);
struct vc4_resource *rsc = vc4_resource_setup(pscreen, tmpl);
- struct pipe_resource *prsc = &rsc->base.b;
+ struct pipe_resource *prsc = &rsc->base;
struct vc4_resource_slice *slice = &rsc->slices[0];
- uint32_t expected_stride =
- align(prsc->width0, vc4_utile_width(rsc->cpp)) * rsc->cpp;
if (!rsc)
return NULL;
- if (handle->stride != expected_stride) {
+ if (whandle->offset != 0) {
+ fprintf(stderr,
+ "Attempt to import unsupported winsys offset %u\n",
+ whandle->offset);
+ return NULL;
+ }
+
+ switch (whandle->type) {
+ case DRM_API_HANDLE_TYPE_SHARED:
+ rsc->bo = vc4_bo_open_name(screen,
+ whandle->handle, whandle->stride);
+ break;
+ case DRM_API_HANDLE_TYPE_FD:
+ rsc->bo = vc4_bo_open_dmabuf(screen,
+ whandle->handle, whandle->stride);
+ break;
+ default:
+ fprintf(stderr,
+ "Attempt to import unsupported handle type %d\n",
+ whandle->type);
+ }
+
+ if (!rsc->bo)
+ goto fail;
+
+ struct drm_vc4_get_tiling get_tiling = {
+ .handle = rsc->bo->handle,
+ };
+ int ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_TILING, &get_tiling);
+
+ if (ret != 0) {
+ whandle->modifier = DRM_FORMAT_MOD_LINEAR;
+ } else if (whandle->modifier == DRM_FORMAT_MOD_INVALID) {
+ whandle->modifier = get_tiling.modifier;
+ } else if (whandle->modifier != get_tiling.modifier) {
+ fprintf(stderr,
+ "Modifier 0x%llx vs. tiling (0x%llx) mismatch\n",
+ (long long)whandle->modifier, get_tiling.modifier);
+ goto fail;
+ }
+
+ switch (whandle->modifier) {
+ case DRM_FORMAT_MOD_LINEAR:
+ rsc->tiled = false;
+ break;
+ case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED:
+ rsc->tiled = true;
+ break;
+ default:
+ fprintf(stderr,
+ "Attempt to import unsupported modifier 0x%llx\n",
+ (long long)whandle->modifier);
+ goto fail;
+ }
+
+ rsc->vc4_format = get_resource_texture_format(prsc);
+ vc4_setup_slices(rsc, "import");
+
+ if (screen->ro) {
+ /* Make sure that renderonly has a handle to our buffer in the
+ * display's fd, so that a later renderonly_get_handle()
+ * returns correct handles or GEM names.
+ */
+ rsc->scanout =
+ renderonly_create_gpu_import_for_resource(prsc,
+ screen->ro,
+ NULL);
+ if (!rsc->scanout)
+ goto fail;
+ }
+
+ if (whandle->stride != slice->stride) {
static bool warned = false;
if (!warned) {
warned = true;
"unsupported stride %d instead of %d\n",
prsc->width0, prsc->height0,
util_format_short_name(prsc->format),
- handle->stride,
- expected_stride);
+ whandle->stride,
+ slice->stride);
}
goto fail;
}
- rsc->tiled = false;
- rsc->bo = vc4_screen_bo_from_handle(pscreen, handle);
- if (!rsc->bo)
- goto fail;
-
- slice->stride = handle->stride;
- slice->tiling = VC4_TILING_FORMAT_LINEAR;
-
- rsc->vc4_format = get_resource_texture_format(prsc);
-
- if (miptree_debug) {
- fprintf(stderr,
- "rsc import %p (format %d), %dx%d: "
- "level 0 (R) -> stride %d@0x%08x\n",
- rsc, rsc->vc4_format,
- prsc->width0, prsc->height0,
- slice->stride, slice->offset);
- }
-
return prsc;
fail:
uint32_t char_w = 140, char_h = 60;
uint32_t char_w_per_tile = char_w / tiles_w - 1;
uint32_t char_h_per_tile = char_h / tiles_h - 1;
- uint32_t found_colors[10];
- uint32_t num_found_colors = 0;
fprintf(stderr, "Surface: %dx%d (%dx MSAA)\n",
psurf->width, psurf->height, psurf->texture->nr_samples);
fprintf(stderr, "-");
fprintf(stderr, "\n");
}
-
- for (int i = 0; i < num_found_colors; i++) {
- fprintf(stderr, "color %d: 0x%08x\n", i, found_colors[i]);
- }
}
/** Debug routine to dump the contents of an 8888 surface to the console */
return;
perf_debug("Updating %dx%d@%d shadow texture due to %s\n",
- orig->base.b.width0, orig->base.b.height0,
+ orig->base.width0, orig->base.height0,
view->u.tex.first_level,
view->u.tex.first_level ? "base level" : "raster layout");
- for (int i = 0; i <= shadow->base.b.last_level; i++) {
- unsigned width = u_minify(shadow->base.b.width0, i);
- unsigned height = u_minify(shadow->base.b.height0, i);
+ for (int i = 0; i <= shadow->base.last_level; i++) {
+ unsigned width = u_minify(shadow->base.width0, i);
+ unsigned height = u_minify(shadow->base.height0, i);
struct pipe_blit_info info = {
.dst = {
- .resource = &shadow->base.b,
+ .resource = &shadow->base,
.level = i,
.box = {
.x = 0,
.height = height,
.depth = 1,
},
- .format = shadow->base.b.format,
+ .format = shadow->base.format,
},
.src = {
- .resource = &orig->base.b,
+ .resource = &orig->base,
.level = view->u.tex.first_level + i,
.box = {
.x = 0,
.height = height,
.depth = 1,
},
- .format = orig->base.b.format,
+ .format = orig->base.format,
},
.mask = ~0,
};
*/
struct pipe_resource *
vc4_get_shadow_index_buffer(struct pipe_context *pctx,
- const struct pipe_index_buffer *ib,
+ const struct pipe_draw_info *info,
+ uint32_t offset,
uint32_t count,
uint32_t *shadow_offset)
{
struct vc4_context *vc4 = vc4_context(pctx);
- struct vc4_resource *orig = vc4_resource(ib->buffer);
+ struct vc4_resource *orig = vc4_resource(info->index.resource);
perf_debug("Fallback conversion for %d uint indices\n", count);
void *data;
struct pipe_transfer *src_transfer = NULL;
const uint32_t *src;
- if (ib->user_buffer) {
- src = ib->user_buffer;
+ if (info->has_user_indices) {
+ src = info->index.user;
} else {
- src = pipe_buffer_map_range(pctx, &orig->base.b,
- ib->offset,
+ src = pipe_buffer_map_range(pctx, &orig->base,
+ offset,
count * 4,
PIPE_TRANSFER_READ, &src_transfer);
}
void
vc4_resource_screen_init(struct pipe_screen *pscreen)
{
+ struct vc4_screen *screen = vc4_screen(pscreen);
+
pscreen->resource_create = vc4_resource_create;
+ pscreen->resource_create_with_modifiers =
+ vc4_resource_create_with_modifiers;
pscreen->resource_from_handle = vc4_resource_from_handle;
- pscreen->resource_get_handle = u_resource_get_handle_vtbl;
pscreen->resource_destroy = u_resource_destroy_vtbl;
+ pscreen->resource_get_handle = vc4_resource_get_handle;
+ pscreen->resource_destroy = vc4_resource_destroy;
+
+ /* Test if the kernel has GET_TILING; it will return -EINVAL if the
+ * ioctl does not exist, but -ENOENT if we pass an impossible handle.
+ * 0 cannot be a valid GEM object, so use that.
+ */
+ struct drm_vc4_get_tiling get_tiling = {
+ .handle = 0x0,
+ };
+ int ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_TILING, &get_tiling);
+ if (ret == -1 && errno == ENOENT)
+ screen->has_tiling_ioctl = true;
}
void
vc4_resource_context_init(struct pipe_context *pctx)
{
- pctx->transfer_map = u_transfer_map_vtbl;
- pctx->transfer_flush_region = u_transfer_flush_region_vtbl;
- pctx->transfer_unmap = u_transfer_unmap_vtbl;
+ pctx->transfer_map = vc4_resource_transfer_map;
+ pctx->transfer_flush_region = u_default_transfer_flush_region;
+ pctx->transfer_unmap = vc4_resource_transfer_unmap;
pctx->buffer_subdata = u_default_buffer_subdata;
pctx->texture_subdata = u_default_texture_subdata;
pctx->create_surface = vc4_create_surface;
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