#ifdef USE_VC4_SIMULATOR
-#include <stdio.h>
-
+#include <sys/mman.h>
+#include "xf86drm.h"
#include "util/u_memory.h"
+#include "util/u_mm.h"
+#include "util/ralloc.h"
#include "vc4_screen.h"
#include "vc4_context.h"
+#include "kernel/vc4_drv.h"
#include "vc4_simulator_validate.h"
#include "simpenrose/simpenrose.h"
-static struct drm_gem_cma_object *
-vc4_wrap_bo_with_cma(struct drm_device *dev, struct vc4_bo *bo)
+/** Global (across GEM fds) state for the simulator */
+static struct vc4_simulator_state {
+ mtx_t mutex;
+
+ void *mem;
+ ssize_t mem_size;
+ struct mem_block *heap;
+ struct mem_block *overflow;
+
+ /** Mapping from GEM handle to struct vc4_simulator_bo * */
+ struct hash_table *fd_map;
+
+ int refcount;
+} sim_state = {
+ .mutex = _MTX_INITIALIZER_NP,
+};
+
+/** Per-GEM-fd state for the simulator. */
+struct vc4_simulator_file {
+ int fd;
+
+ /* This is weird -- we make a "vc4_device" per file, even though on
+ * the kernel side this is a global. We do this so that kernel code
+ * calling us for BO allocation can get to our screen.
+ */
+ struct drm_device dev;
+
+ /** Mapping from GEM handle to struct vc4_simulator_bo * */
+ struct hash_table *bo_map;
+};
+
+/** Wrapper for drm_vc4_bo tracking the simulator-specific state. */
+struct vc4_simulator_bo {
+ struct drm_vc4_bo base;
+ struct vc4_simulator_file *file;
+
+ /** Area for this BO within sim_state->mem */
+ struct mem_block *block;
+
+ int handle;
+};
+
+static void *
+int_to_key(int key)
{
- struct vc4_context *vc4 = dev->vc4;
- struct vc4_screen *screen = vc4->screen;
- struct drm_gem_cma_object *obj = CALLOC_STRUCT(drm_gem_cma_object);
- uint32_t size = align(bo->size, 4096);
+ return (void *)(uintptr_t)key;
+}
+
+static struct vc4_simulator_file *
+vc4_get_simulator_file_for_fd(int fd)
+{
+ struct hash_entry *entry = _mesa_hash_table_search(sim_state.fd_map,
+ int_to_key(fd + 1));
+ return entry ? entry->data : NULL;
+}
+
+/* A marker placed just after each BO, then checked after rendering to make
+ * sure it's still there.
+ */
+#define BO_SENTINEL 0xfedcba98
+
+#define PAGE_ALIGN2 12
+
+/**
+ * Allocates space in simulator memory and returns a tracking struct for it
+ * that also contains the drm_gem_cma_object struct.
+ */
+static struct vc4_simulator_bo *
+vc4_create_simulator_bo(int fd, int handle, unsigned size)
+{
+ struct vc4_simulator_file *file = vc4_get_simulator_file_for_fd(fd);
+ struct vc4_simulator_bo *sim_bo = rzalloc(file,
+ struct vc4_simulator_bo);
+ struct drm_vc4_bo *bo = &sim_bo->base;
+ struct drm_gem_cma_object *obj = &bo->base;
+ size = align(size, 4096);
+
+ sim_bo->file = file;
+ sim_bo->handle = handle;
+
+ mtx_lock(&sim_state.mutex);
+ sim_bo->block = u_mmAllocMem(sim_state.heap, size + 4, PAGE_ALIGN2, 0);
+ mtx_unlock(&sim_state.mutex);
+ assert(sim_bo->block);
- obj->bo = bo;
obj->base.size = size;
- obj->vaddr = screen->simulator_mem_base + dev->simulator_mem_next;
+ obj->base.dev = &file->dev;
+ obj->vaddr = sim_state.mem + sim_bo->block->ofs;
obj->paddr = simpenrose_hw_addr(obj->vaddr);
- dev->simulator_mem_next += size;
- dev->simulator_mem_next = align(dev->simulator_mem_next, 4096);
- assert(dev->simulator_mem_next <= screen->simulator_mem_size);
+ *(uint32_t *)(obj->vaddr + size) = BO_SENTINEL;
- return obj;
+ /* A handle of 0 is used for vc4_gem.c internal allocations that
+ * don't need to go in the lookup table.
+ */
+ if (handle != 0) {
+ mtx_lock(&sim_state.mutex);
+ _mesa_hash_table_insert(file->bo_map, int_to_key(handle), bo);
+ mtx_unlock(&sim_state.mutex);
+ }
+
+ return sim_bo;
}
-static struct drm_gem_cma_object *
-drm_gem_cma_create(struct drm_device *dev, size_t size)
+static void
+vc4_free_simulator_bo(struct vc4_simulator_bo *sim_bo)
{
- struct vc4_context *vc4 = dev->vc4;
- struct vc4_screen *screen = vc4->screen;
+ struct vc4_simulator_file *sim_file = sim_bo->file;
+
+ mtx_lock(&sim_state.mutex);
+ u_mmFreeMem(sim_bo->block);
+ if (sim_bo->handle) {
+ struct hash_entry *entry =
+ _mesa_hash_table_search(sim_file->bo_map,
+ int_to_key(sim_bo->handle));
+ _mesa_hash_table_remove(sim_file->bo_map, entry);
+ }
+ mtx_unlock(&sim_state.mutex);
+ ralloc_free(sim_bo);
+}
+
+static struct vc4_simulator_bo *
+vc4_get_simulator_bo(struct vc4_simulator_file *file, int gem_handle)
+{
+ mtx_lock(&sim_state.mutex);
+ struct hash_entry *entry =
+ _mesa_hash_table_search(file->bo_map, int_to_key(gem_handle));
+ mtx_unlock(&sim_state.mutex);
- struct vc4_bo *bo = vc4_bo_alloc(screen, size, "simulator validate");
- return vc4_wrap_bo_with_cma(dev, bo);
+ return entry ? entry->data : NULL;
+}
+
+struct drm_gem_cma_object *
+drm_gem_cma_create(struct drm_device *dev, size_t size)
+{
+ struct vc4_screen *screen = dev->screen;
+ struct vc4_simulator_bo *sim_bo = vc4_create_simulator_bo(screen->fd,
+ 0, size);
+ return &sim_bo->base.base;
}
static int
-vc4_simulator_pin_bos(struct drm_device *dev, struct exec_info *exec)
+vc4_simulator_pin_bos(struct drm_device *dev, struct vc4_job *job,
+ struct vc4_exec_info *exec)
{
+ int fd = dev->screen->fd;
+ struct vc4_simulator_file *file = vc4_get_simulator_file_for_fd(fd);
struct drm_vc4_submit_cl *args = exec->args;
- struct vc4_context *vc4 = dev->vc4;
- struct vc4_bo **bos = vc4->bo_pointers.base;
+ struct vc4_bo **bos = job->bo_pointers.base;
exec->bo_count = args->bo_handle_count;
exec->bo = calloc(exec->bo_count, sizeof(void *));
for (int i = 0; i < exec->bo_count; i++) {
struct vc4_bo *bo = bos[i];
- struct drm_gem_cma_object *obj = vc4_wrap_bo_with_cma(dev, bo);
+ struct vc4_simulator_bo *sim_bo =
+ vc4_get_simulator_bo(file, bo->handle);
+ struct drm_vc4_bo *drm_bo = &sim_bo->base;
+ struct drm_gem_cma_object *obj = &drm_bo->base;
+ drm_bo->bo = bo;
+#if 0
+ fprintf(stderr, "bo hindex %d: %s\n", i, bo->name);
+#endif
+
+ vc4_bo_map(bo);
memcpy(obj->vaddr, bo->map, bo->size);
exec->bo[i] = obj;
- }
+ /* The kernel does this validation at shader create ioctl
+ * time.
+ */
+ if (strcmp(bo->name, "code") == 0) {
+ drm_bo->validated_shader = vc4_validate_shader(obj);
+ if (!drm_bo->validated_shader)
+ abort();
+ }
+ }
return 0;
}
static int
-vc4_simulator_unpin_bos(struct exec_info *exec)
+vc4_simulator_unpin_bos(struct vc4_exec_info *exec)
{
for (int i = 0; i < exec->bo_count; i++) {
struct drm_gem_cma_object *obj = exec->bo[i];
- struct vc4_bo *bo = obj->bo;
+ struct drm_vc4_bo *drm_bo = to_vc4_bo(&obj->base);
+ struct vc4_bo *bo = drm_bo->bo;
+ assert(*(uint32_t *)(obj->vaddr +
+ obj->base.size) == BO_SENTINEL);
memcpy(bo->map, obj->vaddr, bo->size);
- free(obj);
+ if (drm_bo->validated_shader) {
+ free(drm_bo->validated_shader->texture_samples);
+ free(drm_bo->validated_shader);
+ }
}
free(exec->bo);
return 0;
}
-static int
-vc4_cl_validate(struct drm_device *dev, struct exec_info *exec)
+static void
+vc4_dump_to_file(struct vc4_exec_info *exec)
{
- struct drm_vc4_submit_cl *args = exec->args;
- void *temp = NULL;
- void *bin, *render;
- int ret = 0;
- uint32_t bin_offset = 0;
- uint32_t render_offset = bin_offset + args->bin_cl_len;
- uint32_t shader_rec_offset = roundup(render_offset +
- args->render_cl_len, 16);
- uint32_t uniforms_offset = shader_rec_offset + args->shader_record_len;
- uint32_t exec_size = uniforms_offset + args->uniforms_len;
- uint32_t temp_size = exec_size + (sizeof(struct vc4_shader_state) *
- args->shader_record_count);
-
- if (shader_rec_offset < render_offset ||
- uniforms_offset < shader_rec_offset ||
- exec_size < uniforms_offset ||
- args->shader_record_count >= (UINT_MAX /
- sizeof(struct vc4_shader_state)) ||
- temp_size < exec_size) {
- DRM_ERROR("overflow in exec arguments\n");
- goto fail;
- }
-
- /* Allocate space where we'll store the copied in user command lists
- * and shader records.
- *
- * We don't just copy directly into the BOs because we need to
- * read the contents back for validation, and I think the
- * bo->vaddr is uncached access.
- */
- temp = kmalloc(temp_size, GFP_KERNEL);
- if (!temp) {
- DRM_ERROR("Failed to allocate storage for copying "
- "in bin/render CLs.\n");
- ret = -ENOMEM;
- goto fail;
- }
- bin = temp + bin_offset;
- render = temp + render_offset;
- exec->shader_rec_u = temp + shader_rec_offset;
- exec->uniforms_u = temp + uniforms_offset;
- exec->shader_state = temp + exec_size;
- exec->shader_state_size = args->shader_record_count;
-
- ret = copy_from_user(bin, args->bin_cl, args->bin_cl_len);
- if (ret) {
- DRM_ERROR("Failed to copy in bin cl\n");
- goto fail;
- }
-
- ret = copy_from_user(render, args->render_cl, args->render_cl_len);
- if (ret) {
- DRM_ERROR("Failed to copy in render cl\n");
- goto fail;
- }
-
- ret = copy_from_user(exec->shader_rec_u, args->shader_records,
- args->shader_record_len);
- if (ret) {
- DRM_ERROR("Failed to copy in shader recs\n");
- goto fail;
- }
-
- ret = copy_from_user(exec->uniforms_u, args->uniforms,
- args->uniforms_len);
- if (ret) {
- DRM_ERROR("Failed to copy in uniforms cl\n");
- goto fail;
- }
-
- exec->exec_bo = drm_gem_cma_create(dev, exec_size);
-#if 0
- if (IS_ERR(exec->exec_bo)) {
- DRM_ERROR("Couldn't allocate BO for exec\n");
- ret = PTR_ERR(exec->exec_bo);
- exec->exec_bo = NULL;
- goto fail;
- }
-#endif
+ static int dumpno = 0;
+ struct drm_vc4_get_hang_state *state;
+ struct drm_vc4_get_hang_state_bo *bo_state;
+ unsigned int dump_version = 0;
+
+ if (!(vc4_debug & VC4_DEBUG_DUMP))
+ return;
+
+ state = calloc(1, sizeof(*state));
+
+ int unref_count = 0;
+ list_for_each_entry_safe(struct drm_vc4_bo, bo, &exec->unref_list,
+ unref_head) {
+ unref_count++;
+ }
+
+ /* Add one more for the overflow area that isn't wrapped in a BO. */
+ state->bo_count = exec->bo_count + unref_count + 1;
+ bo_state = calloc(state->bo_count, sizeof(*bo_state));
+
+ char *filename = NULL;
+ asprintf(&filename, "vc4-dri-%d.dump", dumpno++);
+ FILE *f = fopen(filename, "w+");
+ if (!f) {
+ fprintf(stderr, "Couldn't open %s: %s", filename,
+ strerror(errno));
+ return;
+ }
+
+ fwrite(&dump_version, sizeof(dump_version), 1, f);
+
+ state->ct0ca = exec->ct0ca;
+ state->ct0ea = exec->ct0ea;
+ state->ct1ca = exec->ct1ca;
+ state->ct1ea = exec->ct1ea;
+ state->start_bin = exec->ct0ca;
+ state->start_render = exec->ct1ca;
+ fwrite(state, sizeof(*state), 1, f);
+
+ int i;
+ for (i = 0; i < exec->bo_count; i++) {
+ struct drm_gem_cma_object *cma_bo = exec->bo[i];
+ bo_state[i].handle = i; /* Not used by the parser. */
+ bo_state[i].paddr = cma_bo->paddr;
+ bo_state[i].size = cma_bo->base.size;
+ }
+
+ list_for_each_entry_safe(struct drm_vc4_bo, bo, &exec->unref_list,
+ unref_head) {
+ struct drm_gem_cma_object *cma_bo = &bo->base;
+ bo_state[i].handle = 0;
+ bo_state[i].paddr = cma_bo->paddr;
+ bo_state[i].size = cma_bo->base.size;
+ i++;
+ }
+
+ /* Add the static overflow memory area. */
+ bo_state[i].handle = exec->bo_count;
+ bo_state[i].paddr = sim_state.overflow->ofs;
+ bo_state[i].size = sim_state.overflow->size;
+ i++;
- exec->ct0ca = exec->exec_bo->paddr + bin_offset;
- exec->ct0ea = exec->ct0ca + args->bin_cl_len;
- exec->ct1ca = exec->exec_bo->paddr + render_offset;
- exec->ct1ea = exec->ct1ca + args->render_cl_len;
-
- exec->shader_rec_v = exec->exec_bo->vaddr + shader_rec_offset;
- exec->shader_rec_p = exec->exec_bo->paddr + shader_rec_offset;
- exec->shader_rec_size = args->shader_record_len;
-
- exec->uniforms_v = exec->exec_bo->vaddr + uniforms_offset;
- exec->uniforms_p = exec->exec_bo->paddr + uniforms_offset;
- exec->uniforms_size = args->uniforms_len;
-
- ret = vc4_validate_cl(dev,
- exec->exec_bo->vaddr + bin_offset,
- bin,
- args->bin_cl_len,
- true,
- exec);
- if (ret)
- goto fail;
-
- ret = vc4_validate_cl(dev,
- exec->exec_bo->vaddr + render_offset,
- render,
- args->render_cl_len,
- false,
- exec);
- if (ret)
- goto fail;
-
- ret = vc4_validate_shader_recs(dev, exec);
-
-fail:
- kfree(temp);
- return ret;
+ fwrite(bo_state, sizeof(*bo_state), state->bo_count, f);
+
+ for (int i = 0; i < exec->bo_count; i++) {
+ struct drm_gem_cma_object *cma_bo = exec->bo[i];
+ fwrite(cma_bo->vaddr, cma_bo->base.size, 1, f);
+ }
+
+ list_for_each_entry_safe(struct drm_vc4_bo, bo, &exec->unref_list,
+ unref_head) {
+ struct drm_gem_cma_object *cma_bo = &bo->base;
+ fwrite(cma_bo->vaddr, cma_bo->base.size, 1, f);
+ }
+
+ void *overflow = calloc(1, sim_state.overflow->size);
+ fwrite(overflow, 1, sim_state.overflow->size, f);
+ free(overflow);
+
+ free(state);
+ free(bo_state);
+ fclose(f);
}
int
-vc4_simulator_flush(struct vc4_context *vc4, struct drm_vc4_submit_cl *args,
- struct vc4_surface *csurf)
+vc4_simulator_flush(struct vc4_context *vc4,
+ struct drm_vc4_submit_cl *args, struct vc4_job *job)
{
- struct vc4_resource *ctex = vc4_resource(csurf->base.texture);
- uint32_t winsys_stride = ctex->bo->simulator_winsys_stride;
- uint32_t sim_stride = ctex->slices[0].stride;
+ struct vc4_screen *screen = vc4->screen;
+ int fd = screen->fd;
+ struct vc4_simulator_file *file = vc4_get_simulator_file_for_fd(fd);
+ struct vc4_surface *csurf = vc4_surface(vc4->framebuffer.cbufs[0]);
+ struct vc4_resource *ctex = csurf ? vc4_resource(csurf->base.texture) : NULL;
+ uint32_t winsys_stride = ctex ? ctex->bo->simulator_winsys_stride : 0;
+ uint32_t sim_stride = ctex ? ctex->slices[0].stride : 0;
uint32_t row_len = MIN2(sim_stride, winsys_stride);
- struct exec_info exec;
- struct drm_device local_dev = {
- .vc4 = vc4,
- .simulator_mem_next = 0,
- };
- struct drm_device *dev = &local_dev;
+ struct vc4_exec_info exec;
+ struct drm_device *dev = &file->dev;
int ret;
memset(&exec, 0, sizeof(exec));
+ list_inithead(&exec.unref_list);
- if (ctex->bo->simulator_winsys_map) {
+ if (ctex && ctex->bo->simulator_winsys_map) {
#if 0
fprintf(stderr, "%dx%d %d %d %d\n",
ctex->base.b.width0, ctex->base.b.height0,
exec.args = args;
- ret = vc4_simulator_pin_bos(dev, &exec);
+ ret = vc4_simulator_pin_bos(dev, job, &exec);
if (ret)
return ret;
if (ret)
return ret;
- simpenrose_do_binning(exec.ct0ca, exec.ct0ea);
- simpenrose_do_rendering(exec.ct1ca, exec.ct1ea);
+ if (vc4_debug & VC4_DEBUG_CL) {
+ fprintf(stderr, "RCL:\n");
+ vc4_dump_cl(sim_state.mem + exec.ct1ca,
+ exec.ct1ea - exec.ct1ca, true);
+ }
+
+ vc4_dump_to_file(&exec);
+
+ if (exec.ct0ca != exec.ct0ea) {
+ int bfc = simpenrose_do_binning(exec.ct0ca, exec.ct0ea);
+ if (bfc != 1) {
+ fprintf(stderr, "Binning returned %d flushes, should be 1.\n",
+ bfc);
+ fprintf(stderr, "Relocated binning command list:\n");
+ vc4_dump_cl(sim_state.mem + exec.ct0ca,
+ exec.ct0ea - exec.ct0ca, false);
+ abort();
+ }
+ }
+ int rfc = simpenrose_do_rendering(exec.ct1ca, exec.ct1ea);
+ if (rfc != 1) {
+ fprintf(stderr, "Rendering returned %d frames, should be 1.\n",
+ rfc);
+ fprintf(stderr, "Relocated render command list:\n");
+ vc4_dump_cl(sim_state.mem + exec.ct1ca,
+ exec.ct1ea - exec.ct1ca, true);
+ abort();
+ }
ret = vc4_simulator_unpin_bos(&exec);
if (ret)
return ret;
- free(exec.exec_bo);
+ list_for_each_entry_safe(struct drm_vc4_bo, bo, &exec.unref_list,
+ unref_head) {
+ struct vc4_simulator_bo *sim_bo = (struct vc4_simulator_bo *)bo;
+ struct drm_gem_cma_object *obj = &sim_bo->base.base;
+ list_del(&bo->unref_head);
+ assert(*(uint32_t *)(obj->vaddr + obj->base.size) ==
+ BO_SENTINEL);
+ vc4_free_simulator_bo(sim_bo);
+ }
- if (ctex->bo->simulator_winsys_map) {
+ if (ctex && ctex->bo->simulator_winsys_map) {
for (int y = 0; y < ctex->base.b.height0; y++) {
memcpy(ctex->bo->simulator_winsys_map + y * winsys_stride,
ctex->bo->map + y * sim_stride,
return 0;
}
+/**
+ * Do fixups after a BO has been opened from a handle.
+ *
+ * This could be done at DRM_IOCTL_GEM_OPEN/DRM_IOCTL_GEM_PRIME_FD_TO_HANDLE
+ * time, but we're still using drmPrimeFDToHandle() so we have this helper to
+ * be called afterward instead.
+ */
+void vc4_simulator_open_from_handle(int fd, uint32_t winsys_stride,
+ int handle, uint32_t size)
+{
+ vc4_create_simulator_bo(fd, handle, size);
+}
+
+/**
+ * Simulated ioctl(fd, DRM_VC4_CREATE_BO) implementation.
+ *
+ * Making a VC4 BO is just a matter of making a corresponding BO on the host.
+ */
+static int
+vc4_simulator_create_bo_ioctl(int fd, struct drm_vc4_create_bo *args)
+{
+ int ret;
+ struct drm_mode_create_dumb create = {
+ .width = 128,
+ .bpp = 8,
+ .height = (args->size + 127) / 128,
+ };
+
+ ret = drmIoctl(fd, DRM_IOCTL_MODE_CREATE_DUMB, &create);
+ assert(create.size >= args->size);
+
+ args->handle = create.handle;
+
+ vc4_create_simulator_bo(fd, create.handle, args->size);
+
+ return ret;
+}
+
+/**
+ * Simulated ioctl(fd, DRM_VC4_CREATE_SHADER_BO) implementation.
+ *
+ * In simulation we defer shader validation until exec time. Just make a host
+ * BO and memcpy the contents in.
+ */
+static int
+vc4_simulator_create_shader_bo_ioctl(int fd,
+ struct drm_vc4_create_shader_bo *args)
+{
+ int ret;
+ struct drm_mode_create_dumb create = {
+ .width = 128,
+ .bpp = 8,
+ .height = (args->size + 127) / 128,
+ };
+
+ ret = drmIoctl(fd, DRM_IOCTL_MODE_CREATE_DUMB, &create);
+ if (ret)
+ return ret;
+ assert(create.size >= args->size);
+
+ args->handle = create.handle;
+
+ vc4_create_simulator_bo(fd, create.handle, args->size);
+
+ struct drm_mode_map_dumb map = {
+ .handle = create.handle
+ };
+ ret = drmIoctl(fd, DRM_IOCTL_MODE_MAP_DUMB, &map);
+ if (ret)
+ return ret;
+
+ void *shader = mmap(NULL, args->size, PROT_READ | PROT_WRITE, MAP_SHARED,
+ fd, map.offset);
+ memcpy(shader, (void *)(uintptr_t)args->data, args->size);
+ munmap(shader, args->size);
+
+ return 0;
+}
+
+/**
+ * Simulated ioctl(fd, DRM_VC4_MMAP_BO) implementation.
+ *
+ * We just pass this straight through to dumb mmap.
+ */
+static int
+vc4_simulator_mmap_bo_ioctl(int fd, struct drm_vc4_mmap_bo *args)
+{
+ int ret;
+ struct drm_mode_map_dumb map = {
+ .handle = args->handle,
+ };
+
+ ret = drmIoctl(fd, DRM_IOCTL_MODE_MAP_DUMB, &map);
+ args->offset = map.offset;
+
+ return ret;
+}
+
+static int
+vc4_simulator_gem_close_ioctl(int fd, struct drm_gem_close *args)
+{
+ /* Free the simulator's internal tracking. */
+ struct vc4_simulator_file *file = vc4_get_simulator_file_for_fd(fd);
+ struct vc4_simulator_bo *sim_bo = vc4_get_simulator_bo(file,
+ args->handle);
+
+ vc4_free_simulator_bo(sim_bo);
+
+ /* Pass the call on down. */
+ return drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, args);
+}
+
+static int
+vc4_simulator_get_param_ioctl(int fd, struct drm_vc4_get_param *args)
+{
+ switch (args->param) {
+ case DRM_VC4_PARAM_SUPPORTS_BRANCHES:
+ args->value = true;
+ return 0;
+
+ case DRM_VC4_PARAM_V3D_IDENT0:
+ args->value = 0x02000000;
+ return 0;
+
+ case DRM_VC4_PARAM_V3D_IDENT1:
+ args->value = 0x00000001;
+ return 0;
+
+ default:
+ fprintf(stderr, "Unknown DRM_IOCTL_VC4_GET_PARAM(%lld)\n",
+ (long long)args->value);
+ abort();
+ };
+}
+
+int
+vc4_simulator_ioctl(int fd, unsigned long request, void *args)
+{
+ switch (request) {
+ case DRM_IOCTL_VC4_CREATE_BO:
+ return vc4_simulator_create_bo_ioctl(fd, args);
+ case DRM_IOCTL_VC4_CREATE_SHADER_BO:
+ return vc4_simulator_create_shader_bo_ioctl(fd, args);
+ case DRM_IOCTL_VC4_MMAP_BO:
+ return vc4_simulator_mmap_bo_ioctl(fd, args);
+
+ case DRM_IOCTL_VC4_WAIT_BO:
+ case DRM_IOCTL_VC4_WAIT_SEQNO:
+ /* We do all of the vc4 rendering synchronously, so we just
+ * return immediately on the wait ioctls. This ignores any
+ * native rendering to the host BO, so it does mean we race on
+ * front buffer rendering.
+ */
+ return 0;
+
+ case DRM_IOCTL_VC4_GET_PARAM:
+ return vc4_simulator_get_param_ioctl(fd, args);
+
+ case DRM_IOCTL_GEM_CLOSE:
+ return vc4_simulator_gem_close_ioctl(fd, args);
+
+ case DRM_IOCTL_GEM_OPEN:
+ case DRM_IOCTL_GEM_FLINK:
+ return drmIoctl(fd, request, args);
+ default:
+ fprintf(stderr, "Unknown ioctl 0x%08x\n", (int)request);
+ abort();
+ }
+}
+
+static void
+vc4_simulator_init_global(void)
+{
+ mtx_lock(&sim_state.mutex);
+ if (sim_state.refcount++) {
+ mtx_unlock(&sim_state.mutex);
+ return;
+ }
+
+ sim_state.mem_size = 256 * 1024 * 1024;
+ sim_state.mem = calloc(sim_state.mem_size, 1);
+ if (!sim_state.mem)
+ abort();
+ sim_state.heap = u_mmInit(0, sim_state.mem_size);
+
+ /* We supply our own memory so that we can have more aperture
+ * available (256MB instead of simpenrose's default 64MB).
+ */
+ simpenrose_init_hardware_supply_mem(sim_state.mem, sim_state.mem_size);
+
+ /* Carve out low memory for tile allocation overflow. The kernel
+ * should be automatically handling overflow memory setup on real
+ * hardware, but for simulation we just get one shot to set up enough
+ * overflow memory before execution. This overflow mem will be used
+ * up over the whole lifetime of simpenrose (not reused on each
+ * flush), so it had better be big.
+ */
+ sim_state.overflow = u_mmAllocMem(sim_state.heap, 32 * 1024 * 1024,
+ PAGE_ALIGN2, 0);
+ simpenrose_supply_overflow_mem(sim_state.overflow->ofs,
+ sim_state.overflow->size);
+
+ mtx_unlock(&sim_state.mutex);
+
+ sim_state.fd_map =
+ _mesa_hash_table_create(NULL,
+ _mesa_hash_pointer,
+ _mesa_key_pointer_equal);
+}
+
void
vc4_simulator_init(struct vc4_screen *screen)
{
- simpenrose_init_hardware();
- screen->simulator_mem_base = simpenrose_get_mem_start();
- screen->simulator_mem_size = simpenrose_get_mem_size();
+ vc4_simulator_init_global();
+
+ screen->sim_file = rzalloc(screen, struct vc4_simulator_file);
+
+ screen->sim_file->bo_map =
+ _mesa_hash_table_create(screen->sim_file,
+ _mesa_hash_pointer,
+ _mesa_key_pointer_equal);
+
+ mtx_lock(&sim_state.mutex);
+ _mesa_hash_table_insert(sim_state.fd_map, int_to_key(screen->fd + 1),
+ screen->sim_file);
+ mtx_unlock(&sim_state.mutex);
+
+ screen->sim_file->dev.screen = screen;
+}
+
+void
+vc4_simulator_destroy(struct vc4_screen *screen)
+{
+ mtx_lock(&sim_state.mutex);
+ if (!--sim_state.refcount) {
+ _mesa_hash_table_destroy(sim_state.fd_map, NULL);
+ u_mmDestroy(sim_state.heap);
+ free(sim_state.mem);
+ /* No memsetting it, because it contains the mutex. */
+ }
+ mtx_unlock(&sim_state.mutex);
}
#endif /* USE_VC4_SIMULATOR */
projects / mesa.git / blobdiff