*/
#include "pipe/p_state.h"
+#include "util/u_framebuffer.h"
#include "util/u_inlines.h"
#include "util/u_math.h"
#include "util/u_memory.h"
const struct pipe_rasterizer_state *cso)
{
struct vc4_rasterizer_state *so;
+ struct V3D21_DEPTH_OFFSET depth_offset = { V3D21_DEPTH_OFFSET_header };
+ struct V3D21_POINT_SIZE point_size = { V3D21_POINT_SIZE_header };
+ struct V3D21_LINE_WIDTH line_width = { V3D21_LINE_WIDTH_header };
so = CALLOC_STRUCT(vc4_rasterizer_state);
if (!so)
/* Workaround: HW-2726 PTB does not handle zero-size points (BCM2835,
* BCM21553).
*/
- so->point_size = MAX2(cso->point_size, .125f);
+ point_size.point_size = MAX2(cso->point_size, .125f);
+
+ line_width.line_width = cso->line_width;
if (cso->front_ccw)
so->config_bits[0] |= VC4_CONFIG_BITS_CW_PRIMITIVES;
if (cso->offset_tri) {
so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_DEPTH_OFFSET;
- so->offset_units = float_to_187_half(cso->offset_units);
- so->offset_factor = float_to_187_half(cso->offset_scale);
+ depth_offset.depth_offset_units =
+ float_to_187_half(cso->offset_units);
+ depth_offset.depth_offset_factor =
+ float_to_187_half(cso->offset_scale);
}
if (cso->multisample)
so->config_bits[0] |= VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_4X;
+ V3D21_DEPTH_OFFSET_pack(NULL, so->packed.depth_offset, &depth_offset);
+ V3D21_POINT_SIZE_pack(NULL, so->packed.point_size, &point_size);
+ V3D21_LINE_WIDTH_pack(NULL, so->packed.line_width, &line_width);
+
+ if (cso->tile_raster_order_fixed) {
+ so->tile_raster_order_flags |= VC4_SUBMIT_CL_FIXED_RCL_ORDER;
+ if (cso->tile_raster_order_increasing_x) {
+ so->tile_raster_order_flags |=
+ VC4_SUBMIT_CL_RCL_ORDER_INCREASING_X;
+ }
+ if (cso->tile_raster_order_increasing_y) {
+ so->tile_raster_order_flags |=
+ VC4_SUBMIT_CL_RCL_ORDER_INCREASING_Y;
+ }
+ }
+
return so;
}
vc4->dirty |= VC4_DIRTY_VTXBUF;
}
-static void
-vc4_set_index_buffer(struct pipe_context *pctx,
- const struct pipe_index_buffer *ib)
-{
- struct vc4_context *vc4 = vc4_context(pctx);
-
- if (ib) {
- pipe_resource_reference(&vc4->indexbuf.buffer, ib->buffer);
- vc4->indexbuf.index_size = ib->index_size;
- vc4->indexbuf.offset = ib->offset;
- vc4->indexbuf.user_buffer = ib->user_buffer;
- } else {
- pipe_resource_reference(&vc4->indexbuf.buffer, NULL);
- }
-
- vc4->dirty |= VC4_DIRTY_INDEXBUF;
-}
-
static void
vc4_blend_state_bind(struct pipe_context *pctx, void *hwcso)
{
}
static void
-vc4_set_constant_buffer(struct pipe_context *pctx, uint shader, uint index,
+vc4_set_constant_buffer(struct pipe_context *pctx,
+ enum pipe_shader_type shader, uint index,
const struct pipe_constant_buffer *cb)
{
struct vc4_context *vc4 = vc4_context(pctx);
struct vc4_constbuf_stateobj *so = &vc4->constbuf[shader];
- assert(index == 0);
-
/* Note that the state tracker can unbind constant buffers by
* passing NULL here.
*/
return;
}
- assert(!cb->buffer);
+ if (index == 1 && so->cb[index].buffer_size != cb->buffer_size)
+ vc4->dirty |= VC4_DIRTY_UBO_1_SIZE;
+
+ pipe_resource_reference(&so->cb[index].buffer, cb->buffer);
so->cb[index].buffer_offset = cb->buffer_offset;
so->cb[index].buffer_size = cb->buffer_size;
so->cb[index].user_buffer = cb->user_buffer;
const struct pipe_framebuffer_state *framebuffer)
{
struct vc4_context *vc4 = vc4_context(pctx);
- struct vc4_job *job = vc4->job;
struct pipe_framebuffer_state *cso = &vc4->framebuffer;
- unsigned i;
-
- vc4_flush(pctx);
-
- for (i = 0; i < framebuffer->nr_cbufs; i++)
- pipe_surface_reference(&cso->cbufs[i], framebuffer->cbufs[i]);
- for (; i < vc4->framebuffer.nr_cbufs; i++)
- pipe_surface_reference(&cso->cbufs[i], NULL);
-
- cso->nr_cbufs = framebuffer->nr_cbufs;
-
- pipe_surface_reference(&cso->zsbuf, framebuffer->zsbuf);
-
- cso->width = framebuffer->width;
- cso->height = framebuffer->height;
- /* If we're binding to uninitialized buffers, no need to load their
- * contents before drawing..
- */
- if (cso->cbufs[0]) {
- struct vc4_resource *rsc =
- vc4_resource(cso->cbufs[0]->texture);
- if (!rsc->writes)
- job->cleared |= PIPE_CLEAR_COLOR0;
- }
+ vc4->job = NULL;
- if (cso->zsbuf) {
- struct vc4_resource *rsc =
- vc4_resource(cso->zsbuf->texture);
- if (!rsc->writes)
- job->cleared |= PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL;
- }
+ util_copy_framebuffer_state(cso, framebuffer);
/* Nonzero texture mipmap levels are laid out as if they were in
* power-of-two-sized spaces. The renderbuffer config infers its
rsc->cpp);
}
- job->msaa = false;
- if (cso->cbufs[0])
- job->msaa = cso->cbufs[0]->texture->nr_samples > 1;
- else if (cso->zsbuf)
- job->msaa = cso->zsbuf->texture->nr_samples > 1;
-
- if (job->msaa) {
- job->tile_width = 32;
- job->tile_height = 32;
- } else {
- job->tile_width = 64;
- job->tile_height = 64;
- }
- job->draw_tiles_x = DIV_ROUND_UP(cso->width, job->tile_width);
- job->draw_tiles_y = DIV_ROUND_UP(cso->height, job->tile_height);
-
vc4->dirty |= VC4_DIRTY_FRAMEBUFFER;
}
so->base = *cso;
- pipe_reference(NULL, &prsc->reference);
+ so->base.texture = NULL;
+ pipe_resource_reference(&so->base.texture, prsc);
+ so->base.reference.count = 1;
+ so->base.context = pctx;
/* There is no hardware level clamping, and the start address of a
* texture may be misaligned, so in that case we have to copy to a
*/
if ((cso->u.tex.first_level &&
(cso->u.tex.first_level != cso->u.tex.last_level)) ||
- rsc->vc4_format == VC4_TEXTURE_TYPE_RGBA32R) {
- struct vc4_resource *shadow_parent = vc4_resource(prsc);
- struct pipe_resource tmpl = shadow_parent->base.b;
- struct vc4_resource *clone;
-
- tmpl.bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET;
- tmpl.width0 = u_minify(tmpl.width0, cso->u.tex.first_level);
- tmpl.height0 = u_minify(tmpl.height0, cso->u.tex.first_level);
- tmpl.last_level = cso->u.tex.last_level - cso->u.tex.first_level;
-
+ rsc->vc4_format == VC4_TEXTURE_TYPE_RGBA32R ||
+ rsc->vc4_format == ~0) {
+ struct vc4_resource *shadow_parent = rsc;
+ struct pipe_resource tmpl = {
+ .target = prsc->target,
+ .format = prsc->format,
+ .width0 = u_minify(prsc->width0,
+ cso->u.tex.first_level),
+ .height0 = u_minify(prsc->height0,
+ cso->u.tex.first_level),
+ .bind = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET,
+ .last_level = cso->u.tex.last_level - cso->u.tex.first_level,
+ .nr_samples = prsc->nr_samples,
+ };
+
+ /* Create the shadow texture. The rest of the texture
+ * parameter setup will use the shadow.
+ */
prsc = vc4_resource_create(pctx->screen, &tmpl);
if (!prsc) {
free(so);
return NULL;
}
rsc = vc4_resource(prsc);
- clone = vc4_resource(prsc);
- clone->shadow_parent = &shadow_parent->base.b;
+ vc4_bo_label(vc4_screen(pctx->screen), rsc->bo,
+ "tiling shadow %dx%d",
+ tmpl.width0, tmpl.height0);
+
/* Flag it as needing update of the contents from the parent. */
- clone->writes = shadow_parent->writes - 1;
+ rsc->writes = shadow_parent->writes - 1;
+ assert(rsc->vc4_format != VC4_TEXTURE_TYPE_RGBA32R);
- assert(clone->vc4_format != VC4_TEXTURE_TYPE_RGBA32R);
- } else if (cso->u.tex.first_level) {
- so->force_first_level = true;
+ so->texture = prsc;
+ } else {
+ pipe_resource_reference(&so->texture, prsc);
+
+ if (cso->u.tex.first_level) {
+ so->force_first_level = true;
+ }
}
- so->base.texture = prsc;
- so->base.reference.count = 1;
- so->base.context = pctx;
so->texture_p0 =
- (VC4_SET_FIELD(rsc->slices[0].offset >> 12, VC4_TEX_P0_OFFSET) |
+ (VC4_SET_FIELD((rsc->slices[0].offset +
+ cso->u.tex.first_layer *
+ rsc->cube_map_stride) >> 12, VC4_TEX_P0_OFFSET) |
VC4_SET_FIELD(rsc->vc4_format & 15, VC4_TEX_P0_TYPE) |
VC4_SET_FIELD(so->force_first_level ?
cso->u.tex.last_level :
VC4_SET_FIELD(prsc->height0 & 2047, VC4_TEX_P1_HEIGHT) |
VC4_SET_FIELD(prsc->width0 & 2047, VC4_TEX_P1_WIDTH));
+ if (prsc->format == PIPE_FORMAT_ETC1_RGB8)
+ so->texture_p1 |= VC4_TEX_P1_ETCFLIP_MASK;
+
return &so->base;
}
static void
vc4_sampler_view_destroy(struct pipe_context *pctx,
- struct pipe_sampler_view *view)
+ struct pipe_sampler_view *pview)
{
+ struct vc4_sampler_view *view = vc4_sampler_view(pview);
+ pipe_resource_reference(&pview->texture, NULL);
pipe_resource_reference(&view->texture, NULL);
free(view);
}
pctx->set_viewport_states = vc4_set_viewport_states;
pctx->set_vertex_buffers = vc4_set_vertex_buffers;
- pctx->set_index_buffer = vc4_set_index_buffer;
pctx->create_blend_state = vc4_create_blend_state;
pctx->bind_blend_state = vc4_blend_state_bind;
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