broadcom/vc5: Fix alignment of miplevel 1 with UIF.
[mesa.git] / src / gallium / drivers / vc5 / vc5_resource.h
index 7d473679ebe7d821ce76ec7e0ea851e56f611072..1bba480115b01efb96eb8b35f4e7d03271a9522c 100644 (file)
@@ -68,15 +68,14 @@ enum vc5_tiling_mode {
 struct vc5_transfer {
         struct pipe_transfer base;
         void *map;
-
-        struct pipe_resource *ss_resource;
-        struct pipe_box ss_box;
 };
 
 struct vc5_resource_slice {
         uint32_t offset;
         uint32_t stride;
+        uint32_t padded_height;
         uint32_t size;
+        uint8_t ub_pad;
         enum vc5_tiling_mode tiling;
 };
 
@@ -100,6 +99,13 @@ struct vc5_surface {
          * TILE_RENDERING_MODE_CONFIGURATION.
          */
         uint8_t internal_bpp;
+
+        uint32_t padded_height_of_output_image_in_uif_blocks;
+
+        /* If the resource being referenced is separate stencil, then this is
+         * the surface to use when reading/writing stencil.
+         */
+        struct pipe_surface *separate_stencil;
 };
 
 struct vc5_resource {
@@ -128,6 +134,11 @@ struct vc5_resource {
          * buffer) may get marked.
          */
         uint32_t initialized_buffers;
+
+        enum pipe_format internal_format;
+
+        /* Resource storing the S8 part of a Z32F_S8 resource, or NULL. */
+        struct vc5_resource *separate_stencil;
 };
 
 static inline struct vc5_resource *