virgl: use uint16_t mask instead of separate booleans

[mesa.git] / src / gallium / drivers / virgl / virgl_buffer.c

diff --git a/src/gallium/drivers/virgl/virgl_buffer.c b/src/gallium/drivers/virgl/virgl_buffer.c
index ae4e74c793605fdfb43d3d3ebddcfb431022ca13..3baccc010be878b92852c7e734c7659adf3f32da 100644 (file)
--- a/src/gallium/drivers/virgl/virgl_buffer.c
+++ b/src/gallium/drivers/virgl/virgl_buffer.c
@@ -40,28 +40,25 @@ static void *virgl_buffer_transfer_map(struct pipe_context *ctx,
    struct virgl_transfer *trans;
    void *ptr;
    bool readback;
-   bool doflushwait = false;
+   bool flush = false;
 
    trans = virgl_resource_create_transfer(&vctx->transfer_pool, resource,
                                           &vbuf->metadata, level, usage, box);
    if (usage & PIPE_TRANSFER_READ)
-      doflushwait = true;
+      flush = true;
    else
-      doflushwait = virgl_res_needs_flush_wait(vctx, trans);
+      flush = virgl_res_needs_flush(vctx, trans);
 
-   if (doflushwait)
+   if (flush)
       ctx->flush(ctx, NULL, 0);
 
    readback = virgl_res_needs_readback(vctx, vbuf, usage, 0);
-   if (readback)
+   if (readback) {
       vs->vws->transfer_get(vs->vws, vbuf->hw_res, box, trans->base.stride,
                             trans->l_stride, trans->offset, level);
 
-   if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED))
-      doflushwait = true;
-
-   if (doflushwait || readback)
       vs->vws->resource_wait(vs->vws, vbuf->hw_res);
+   }
 
    ptr = vs->vws->resource_map(vs->vws, vbuf->hw_res);
    if (!ptr) {