radeonsi: just read tile mode arrays in SDMA setup

[mesa.git] / src / gallium / drivers / virgl / virgl_buffer.c

diff --git a/src/gallium/drivers/virgl/virgl_buffer.c b/src/gallium/drivers/virgl/virgl_buffer.c
index 93fb29598a91c9a0a9ba29337c58cfd0758aaefe..94034072439d6f9b33b3c0a7f06e2df62585e2ef 100644 (file)
--- a/src/gallium/drivers/virgl/virgl_buffer.c
+++ b/src/gallium/drivers/virgl/virgl_buffer.c
@@ -21,9 +21,11 @@
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
+#include "util/u_inlines.h"
 #include "util/u_memory.h"
 #include "virgl_context.h"
 #include "virgl_resource.h"
+#include "virgl_screen.h"
 
 static void virgl_buffer_destroy(struct pipe_screen *screen,
                                  struct pipe_resource *buf)
@@ -43,7 +45,7 @@ static void *virgl_buffer_transfer_map(struct pipe_context *ctx,
                                        const struct pipe_box *box,
                                        struct pipe_transfer **transfer)
 {
-   struct virgl_context *vctx = (struct virgl_context *)ctx;
+   struct virgl_context *vctx = virgl_context(ctx);
    struct virgl_screen *vs = virgl_screen(ctx->screen);
    struct virgl_buffer *vbuf = virgl_buffer(resource);
    struct virgl_transfer *trans;
@@ -61,7 +63,7 @@ static void *virgl_buffer_transfer_map(struct pipe_context *ctx,
       ctx->flush(ctx, NULL, 0);
 
    trans = util_slab_alloc(&vctx->texture_transfer_pool);
-   if (trans == NULL)
+   if (!trans)
       return NULL;
 
    trans->base.resource = resource;
@@ -97,8 +99,8 @@ static void *virgl_buffer_transfer_map(struct pipe_context *ctx,
 static void virgl_buffer_transfer_unmap(struct pipe_context *ctx,
                                         struct pipe_transfer *transfer)
 {
-   struct virgl_context *vctx = (struct virgl_context *)ctx;
-   struct virgl_transfer *trans = (struct virgl_transfer *)transfer;
+   struct virgl_context *vctx = virgl_context(ctx);
+   struct virgl_transfer *trans = virgl_transfer(transfer);
    struct virgl_buffer *vbuf = virgl_buffer(transfer->resource);
 
    if (trans->base.usage & PIPE_TRANSFER_WRITE) {
@@ -119,7 +121,7 @@ static void virgl_buffer_transfer_flush_region(struct pipe_context *ctx,
                                                struct pipe_transfer *transfer,
                                                const struct pipe_box *box)
 {
-   struct virgl_context *vctx = (struct virgl_context *)ctx;
+   struct virgl_context *vctx = virgl_context(ctx);
    struct virgl_buffer *vbuf = virgl_buffer(transfer->resource);
 
    if (!vbuf->on_list) {