* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include <stdint.h>
+#include <assert.h>
+#include <string.h>
+#include "util/u_format.h"
#include "util/u_memory.h"
#include "util/u_math.h"
#include "pipe/p_state.h"
-#include "virgl_encode.h"
-#include "virgl_resource.h"
#include "tgsi/tgsi_dump.h"
#include "tgsi/tgsi_parse.h"
+#include "virgl_context.h"
+#include "virgl_encode.h"
+#include "virgl_protocol.h"
+#include "virgl_resource.h"
+#include "virgl_screen.h"
+
static int virgl_encoder_write_cmd_dword(struct virgl_context *ctx,
uint32_t dword)
{
double depth, unsigned stencil)
{
int i;
+ uint64_t qword;
+
+ STATIC_ASSERT(sizeof(qword) == sizeof(depth));
+ memcpy(&qword, &depth, sizeof(qword));
virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_CLEAR, 0, VIRGL_OBJ_CLEAR_SIZE));
virgl_encoder_write_dword(ctx->cbuf, buffers);
for (i = 0; i < 4; i++)
virgl_encoder_write_dword(ctx->cbuf, color->ui[i]);
- virgl_encoder_write_qword(ctx->cbuf, *(uint64_t *)&depth);
+ virgl_encoder_write_qword(ctx->cbuf, qword);
virgl_encoder_write_dword(ctx->cbuf, stencil);
return 0;
}
int virgl_encoder_set_framebuffer_state(struct virgl_context *ctx,
const struct pipe_framebuffer_state *state)
{
- struct virgl_surface *zsurf = (struct virgl_surface *)state->zsbuf;
+ struct virgl_surface *zsurf = virgl_surface(state->zsbuf);
int i;
virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_SET_FRAMEBUFFER_STATE, 0, VIRGL_SET_FRAMEBUFFER_STATE_SIZE(state->nr_cbufs)));
virgl_encoder_write_dword(ctx->cbuf, state->nr_cbufs);
virgl_encoder_write_dword(ctx->cbuf, zsurf ? zsurf->handle : 0);
for (i = 0; i < state->nr_cbufs; i++) {
- struct virgl_surface *surf = (struct virgl_surface *)state->cbufs[i];
+ struct virgl_surface *surf = virgl_surface(state->cbufs[i]);
virgl_encoder_write_dword(ctx->cbuf, surf ? surf->handle : 0);
}
int i;
virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_SET_VERTEX_BUFFERS, 0, VIRGL_SET_VERTEX_BUFFERS_SIZE(num_buffers)));
for (i = 0; i < num_buffers; i++) {
- struct virgl_resource *res = (struct virgl_resource *)buffers[i].buffer;
+ struct virgl_resource *res = virgl_resource(buffers[i].buffer.resource);
virgl_encoder_write_dword(ctx->cbuf, buffers[i].stride);
virgl_encoder_write_dword(ctx->cbuf, buffers[i].buffer_offset);
virgl_encoder_write_res(ctx, res);
}
int virgl_encoder_set_index_buffer(struct virgl_context *ctx,
- const struct pipe_index_buffer *ib)
+ const struct virgl_indexbuf *ib)
{
int length = VIRGL_SET_INDEX_BUFFER_SIZE(ib);
struct virgl_resource *res = NULL;
if (ib)
- res = (struct virgl_resource *)ib->buffer;
+ res = virgl_resource(ib->buffer);
virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_SET_INDEX_BUFFER, 0, length));
virgl_encoder_write_res(ctx, res);
virgl_encoder_write_dword(ctx->cbuf, info->start);
virgl_encoder_write_dword(ctx->cbuf, info->count);
virgl_encoder_write_dword(ctx->cbuf, info->mode);
- virgl_encoder_write_dword(ctx->cbuf, info->indexed);
+ virgl_encoder_write_dword(ctx->cbuf, !!info->index_size);
virgl_encoder_write_dword(ctx->cbuf, info->instance_count);
virgl_encoder_write_dword(ctx->cbuf, info->index_bias);
virgl_encoder_write_dword(ctx->cbuf, info->start_instance);
struct virgl_resource *res,
const struct pipe_sampler_view *state)
{
+ unsigned elem_size = util_format_get_blocksize(state->format);
+
uint32_t tmp;
virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_CREATE_OBJECT, VIRGL_OBJECT_SAMPLER_VIEW, VIRGL_OBJ_SAMPLER_VIEW_SIZE));
virgl_encoder_write_dword(ctx->cbuf, handle);
virgl_encoder_write_res(ctx, res);
virgl_encoder_write_dword(ctx->cbuf, state->format);
if (res->u.b.target == PIPE_BUFFER) {
- virgl_encoder_write_dword(ctx->cbuf, state->u.buf.first_element);
- virgl_encoder_write_dword(ctx->cbuf, state->u.buf.last_element);
+ virgl_encoder_write_dword(ctx->cbuf, state->u.buf.offset / elem_size);
+ virgl_encoder_write_dword(ctx->cbuf, (state->u.buf.offset + state->u.buf.size) / elem_size - 1);
} else {
virgl_encoder_write_dword(ctx->cbuf, state->u.tex.first_layer | state->u.tex.last_layer << 16);
virgl_encoder_write_dword(ctx->cbuf, state->u.tex.first_level | state->u.tex.last_level << 8);
virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_BLIT, 0, VIRGL_CMD_BLIT_SIZE));
tmp = VIRGL_CMD_BLIT_S0_MASK(blit->mask) |
VIRGL_CMD_BLIT_S0_FILTER(blit->filter) |
- VIRGL_CMD_BLIT_S0_SCISSOR_ENABLE(blit->scissor_enable);
+ VIRGL_CMD_BLIT_S0_SCISSOR_ENABLE(blit->scissor_enable) |
+ VIRGL_CMD_BLIT_S0_RENDER_CONDITION_ENABLE(blit->render_condition_enable) |
+ VIRGL_CMD_BLIT_S0_ALPHA_BLEND(blit->alpha_blend);
virgl_encoder_write_dword(ctx->cbuf, tmp);
virgl_encoder_write_dword(ctx->cbuf, (blit->scissor.minx | blit->scissor.miny << 16));
virgl_encoder_write_dword(ctx->cbuf, (blit->scissor.maxx | blit->scissor.maxy << 16));
int virgl_encoder_render_condition(struct virgl_context *ctx,
uint32_t handle, boolean condition,
- uint mode)
+ enum pipe_render_cond_flag mode)
{
virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_SET_RENDER_CONDITION, 0, VIRGL_RENDER_CONDITION_SIZE));
virgl_encoder_write_dword(ctx->cbuf, handle);
virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_SET_STREAMOUT_TARGETS, 0, num_targets + 1));
virgl_encoder_write_dword(ctx->cbuf, append_bitmask);
for (i = 0; i < num_targets; i++) {
- struct virgl_so_target *tg = (struct virgl_so_target *)targets[i];
+ struct virgl_so_target *tg = virgl_so_target(targets[i]);
virgl_encoder_write_dword(ctx->cbuf, tg->handle);
}
return 0;