radeonsi: move PKT3_WRITE_DATA generation into a helper function

[mesa.git] / src / gallium / drivers / virgl / virgl_protocol.h

diff --git a/src/gallium/drivers/virgl/virgl_protocol.h b/src/gallium/drivers/virgl/virgl_protocol.h
index 982bc5c8c2bb28f557764db0a134e8f95d756d16..7c9ea9f7254a94e01c7392cedcd5be9790db13c1 100644 (file)
--- a/src/gallium/drivers/virgl/virgl_protocol.h
+++ b/src/gallium/drivers/virgl/virgl_protocol.h
@@ -83,7 +83,6 @@ enum virgl_context_cmd {
    VIRGL_CCMD_CREATE_SUB_CTX,
    VIRGL_CCMD_DESTROY_SUB_CTX,
    VIRGL_CCMD_BIND_SHADER,
-
    VIRGL_CCMD_SET_TESS_STATE,
    VIRGL_CCMD_SET_MIN_SAMPLES,
    VIRGL_CCMD_SET_SHADER_BUFFERS,
@@ -91,6 +90,9 @@ enum virgl_context_cmd {
    VIRGL_CCMD_MEMORY_BARRIER,
    VIRGL_CCMD_LAUNCH_GRID,
    VIRGL_CCMD_SET_FRAMEBUFFER_STATE_NO_ATTACH,
+   VIRGL_CCMD_TEXTURE_BARRIER,
+   VIRGL_CCMD_SET_ATOMIC_BUFFERS,
+   VIRGL_CCMD_SET_DEBUG_FLAGS,
 };
 
 /*
@@ -221,7 +223,7 @@ enum virgl_context_cmd {
 #define VIRGL_OBJ_SHADER_OFFSET_VAL(x) (((x) & 0x7fffffff) << 0)
 /* start contains full length in VAL - also implies continuations */
 /* continuation contains offset in VAL */
-#define VIRGL_OBJ_SHADER_OFFSET_CONT (0x1 << 31)
+#define VIRGL_OBJ_SHADER_OFFSET_CONT (0x1u << 31)
 #define VIRGL_OBJ_SHADER_NUM_TOKENS 4
 #define VIRGL_OBJ_SHADER_SO_NUM_OUTPUTS 5
 #define VIRGL_OBJ_SHADER_SO_STRIDE(x) (6 + (x))
@@ -520,6 +522,7 @@ enum virgl_context_cmd {
 #define VIRGL_MEMORY_BARRIER_SIZE 1
 #define VIRGL_MEMORY_BARRIER_FLAGS 1
 
+/* launch grid */
 #define VIRGL_LAUNCH_GRID_SIZE 8
 #define VIRGL_LAUNCH_BLOCK_X 1
 #define VIRGL_LAUNCH_BLOCK_Y 2
@@ -539,4 +542,16 @@ enum virgl_context_cmd {
 #define VIRGL_SET_FRAMEBUFFER_STATE_NO_ATTACH_LAYERS(x) (x & 0xffff)
 #define VIRGL_SET_FRAMEBUFFER_STATE_NO_ATTACH_SAMPLES(x) ((x >> 16) & 0xff)
 
+/* texture barrier */
+#define VIRGL_TEXTURE_BARRIER_SIZE 1
+#define VIRGL_TEXTURE_BARRIER_FLAGS 1
+
+/* hw atomics */
+#define VIRGL_SET_ATOMIC_BUFFER_ELEMENT_SIZE 3
+#define VIRGL_SET_ATOMIC_BUFFER_SIZE(x) (VIRGL_SET_ATOMIC_BUFFER_ELEMENT_SIZE * (x)) + 1
+#define VIRGL_SET_ATOMIC_BUFFER_START_SLOT 1
+#define VIRGL_SET_ATOMIC_BUFFER_OFFSET(x) ((x) * VIRGL_SET_ATOMIC_BUFFER_ELEMENT_SIZE + 2)
+#define VIRGL_SET_ATOMIC_BUFFER_LENGTH(x) ((x) * VIRGL_SET_ATOMIC_BUFFER_ELEMENT_SIZE + 3)
+#define VIRGL_SET_ATOMIC_BUFFER_RES_HANDLE(x) ((x) * VIRGL_SET_ATOMIC_BUFFER_ELEMENT_SIZE + 4)
+
 #endif