gallium: add PIPE_SHADER_CAP_GLSL_16BIT_TEMPS for LowerPrecisionTemporaries
[mesa.git] / src / gallium / drivers / virgl / virgl_screen.c
index edcc4aa374d500f9078ae38729841427a50e38bc..3591762c9e3628b6ff3d49a6f03d4e4ac5712042 100644 (file)
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 #include "util/u_memory.h"
-#include "util/u_format.h"
-#include "util/u_format_s3tc.h"
+#include "util/format/u_format.h"
+#include "util/format/u_format_s3tc.h"
 #include "util/u_screen.h"
 #include "util/u_video.h"
 #include "util/u_math.h"
 #include "util/os_time.h"
+#include "util/xmlconfig.h"
 #include "pipe/p_defines.h"
 #include "pipe/p_screen.h"
 
 #include "virgl_resource.h"
 #include "virgl_public.h"
 #include "virgl_context.h"
+#include "virgl_protocol.h"
 
 int virgl_debug = 0;
 static const struct debug_named_value debug_options[] = {
-   { "verbose", VIRGL_DEBUG_VERBOSE, NULL },
-   { "tgsi", VIRGL_DEBUG_TGSI, NULL },
+   { "verbose",   VIRGL_DEBUG_VERBOSE,             NULL },
+   { "tgsi",      VIRGL_DEBUG_TGSI,                NULL },
+   { "emubgra",   VIRGL_DEBUG_EMULATE_BGRA,        "Enable tweak to emulate BGRA as RGBA on GLES hosts"},
+   { "bgraswz",   VIRGL_DEBUG_BGRA_DEST_SWIZZLE,   "Enable tweak to swizzle emulated BGRA on GLES hosts" },
+   { "sync",      VIRGL_DEBUG_SYNC,                "Sync after every flush" },
+   { "xfer",      VIRGL_DEBUG_XFER,                "Do not optimize for transfers" },
    DEBUG_NAMED_VALUE_END
 };
 DEBUG_GET_ONCE_FLAGS_OPTION(virgl_debug, "VIRGL_DEBUG", debug_options, 0)
@@ -48,7 +54,7 @@ DEBUG_GET_ONCE_FLAGS_OPTION(virgl_debug, "VIRGL_DEBUG", debug_options, 0)
 static const char *
 virgl_get_vendor(struct pipe_screen *screen)
 {
-   return "Red Hat";
+   return "Mesa/X.org";
 }
 
 
@@ -65,7 +71,9 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
    switch (param) {
    case PIPE_CAP_NPOT_TEXTURES:
       return 1;
-   case PIPE_CAP_SM3:
+   case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
+   case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
+   case PIPE_CAP_VERTEX_SHADER_SATURATE:
       return 1;
    case PIPE_CAP_ANISOTROPIC_FILTER:
       return 1;
@@ -82,10 +90,10 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
       return vscreen->caps.caps.v1.bset.mirror_clamp;
    case PIPE_CAP_TEXTURE_SWIZZLE:
       return 1;
-   case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
+   case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
       if (vscreen->caps.caps.v2.max_texture_2d_size)
-         return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_2d_size);
-      return 15; /* 16K x 16K */
+         return vscreen->caps.caps.v2.max_texture_2d_size;
+      return 16384;
    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
       if (vscreen->caps.caps.v2.max_texture_3d_size)
          return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_3d_size);
@@ -107,13 +115,18 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
       return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
    case PIPE_CAP_DEPTH_CLIP_DISABLE:
-      return vscreen->caps.caps.v1.bset.depth_clip_disable;
+      if (vscreen->caps.caps.v1.bset.depth_clip_disable)
+         return 1;
+      if (vscreen->caps.caps.v2.host_feature_check_version >= 3)
+         return 2;
+      return 0;
    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
       return vscreen->caps.caps.v1.max_streamout_buffers;
    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
       return 16*4;
    case PIPE_CAP_PRIMITIVE_RESTART:
+   case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
       return vscreen->caps.caps.v1.bset.primitive_restart;
    case PIPE_CAP_SHADER_STENCIL_EXPORT:
       return vscreen->caps.caps.v1.bset.shader_stencil_export;
@@ -246,8 +259,9 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FB_NO_ATTACH;
    case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_ROBUST_BUFFER_ACCESS;
-   case PIPE_CAP_TGSI_FS_FBFETCH:
-      return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_FBFETCH;
+   case PIPE_CAP_FBFETCH:
+      return (vscreen->caps.caps.v2.capability_bits &
+              VIRGL_CAP_TGSI_FBFETCH) ? 1 : 0;
    case PIPE_CAP_TGSI_CLOCK:
       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK;
    case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
@@ -273,19 +287,18 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
       return (vscreen->caps.caps.v1.max_samples == 1) ? 1 : 0;
    case PIPE_CAP_MULTI_DRAW_INDIRECT:
       return !!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_MULTI_DRAW_INDIRECT);
+   case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
+      return !!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_PARAMS);
    case PIPE_CAP_TEXTURE_GATHER_SM5:
    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
-   case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
-   case PIPE_CAP_CLIP_HALFZ:
    case PIPE_CAP_VERTEXID_NOBASE:
    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
    case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
    case PIPE_CAP_DEPTH_BOUNDS_TEST:
    case PIPE_CAP_SHAREABLE_SHADERS:
-   case PIPE_CAP_CLEAR_TEXTURE:
    case PIPE_CAP_DRAW_PARAMETERS:
    case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
    case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
@@ -339,6 +352,10 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
    case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
       return 0;
+   case PIPE_CAP_CLEAR_TEXTURE:
+      return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_CLEAR_TEXTURE;
+   case PIPE_CAP_CLIP_HALFZ:
+      return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_CLIP_HALFZ;
    case PIPE_CAP_MAX_GS_INVOCATIONS:
       return 32;
    case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
@@ -355,7 +372,10 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_NATIVE_FENCE_FD:
       return vscreen->vws->supports_fences;
    case PIPE_CAP_DEST_SURFACE_SRGB_CONTROL:
-      return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SRGB_WRITE_CONTROL;
+      return (vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SRGB_WRITE_CONTROL) ||
+            (vscreen->caps.caps.v2.host_feature_check_version < 1);
+   case PIPE_CAP_TGSI_SKIP_SHRINK_IO_ARRAYS:
+      return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_INPUT_ADDR;
    default:
       return u_pipe_screen_get_param_defaults(screen, param);
    }
@@ -394,6 +414,9 @@ virgl_get_shader_param(struct pipe_screen *screen,
       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
          return 1;
+      case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
+      case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
+         return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_INPUT_ADDR;
       case PIPE_SHADER_CAP_MAX_INPUTS:
          if (vscreen->caps.caps.v1.glsl_level < 150)
             return vscreen->caps.caps.v2.max_vertex_attribs;
@@ -441,9 +464,10 @@ virgl_get_shader_param(struct pipe_screen *screen,
       case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
       case PIPE_SHADER_CAP_INT64_ATOMICS:
       case PIPE_SHADER_CAP_FP16:
+      case PIPE_SHADER_CAP_FP16_DERIVATIVES:
+      case PIPE_SHADER_CAP_INT16:
+      case PIPE_SHADER_CAP_GLSL_16BIT_TEMPS:
          return 0;
-      case PIPE_SHADER_CAP_SCALAR_ISA:
-         return 1;
       default:
          return 0;
       }
@@ -524,7 +548,28 @@ virgl_get_compute_param(struct pipe_screen *screen,
    return 0;
 }
 
-static boolean
+static bool
+has_format_bit(struct virgl_supported_format_mask *mask,
+               enum virgl_formats fmt)
+{
+   assert(fmt < VIRGL_FORMAT_MAX);
+   unsigned val = (unsigned)fmt;
+   unsigned idx = val / 32;
+   unsigned bit = val % 32;
+   assert(idx < ARRAY_SIZE(mask->bitmask));
+   return (mask->bitmask[idx] & (1u << bit)) != 0;
+}
+
+bool
+virgl_has_readback_format(struct pipe_screen *screen,
+                          enum virgl_formats fmt)
+{
+   struct virgl_screen *vscreen = virgl_screen(screen);
+   return has_format_bit(&vscreen->caps.caps.v2.supported_readback_formats,
+                         fmt);
+}
+
+static bool
 virgl_is_vertex_format_supported(struct pipe_screen *screen,
                                  enum pipe_format format)
 {
@@ -534,15 +579,15 @@ virgl_is_vertex_format_supported(struct pipe_screen *screen,
 
    format_desc = util_format_description(format);
    if (!format_desc)
-      return FALSE;
+      return false;
 
    if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
       int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
       int big = vformat / 32;
       int small = vformat % 32;
       if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
-         return FALSE;
-      return TRUE;
+         return false;
+      return true;
    }
 
    /* Find the first non-VOID channel. */
@@ -553,14 +598,45 @@ virgl_is_vertex_format_supported(struct pipe_screen *screen,
    }
 
    if (i == 4)
-      return FALSE;
+      return false;
 
    if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
-      return FALSE;
+      return false;
 
    if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
-      return FALSE;
-   return TRUE;
+      return false;
+   return true;
+}
+
+static bool
+virgl_format_check_bitmask(enum pipe_format format,
+                           uint32_t bitmask[16],
+                           bool may_emulate_bgra)
+{
+   enum virgl_formats vformat = pipe_to_virgl_format(format);
+   int big = vformat / 32;
+   int small = vformat % 32;
+   if ((bitmask[big] & (1 << small)))
+      return true;
+
+   /* On GLES hosts we don't advertise BGRx_SRGB, but we may be able
+    * emulate it by using a swizzled RGBx */
+   if (may_emulate_bgra) {
+      if (format == PIPE_FORMAT_B8G8R8A8_SRGB)
+         format = PIPE_FORMAT_R8G8B8A8_SRGB;
+      else if (format == PIPE_FORMAT_B8G8R8X8_SRGB)
+         format = PIPE_FORMAT_R8G8B8X8_SRGB;
+      else {
+         return false;
+      }
+
+      vformat = pipe_to_virgl_format(format);
+      big = vformat / 32;
+      small = vformat % 32;
+      if (bitmask[big] & (1 << small))
+         return true;
+   }
+   return false;
 }
 
 /**
@@ -568,7 +644,7 @@ virgl_is_vertex_format_supported(struct pipe_screen *screen,
  * \param format  the format to test
  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
  */
-static boolean
+static bool
 virgl_is_format_supported( struct pipe_screen *screen,
                                  enum pipe_format format,
                                  enum pipe_texture_target target,
@@ -580,9 +656,17 @@ virgl_is_format_supported( struct pipe_screen *screen,
    const struct util_format_description *format_desc;
    int i;
 
+   union virgl_caps *caps = &vscreen->caps.caps; 
+   boolean may_emulate_bgra = (caps->v2.capability_bits &
+                               VIRGL_CAP_APP_TWEAK_SUPPORT) &&
+                               vscreen->tweak_gles_emulate_bgra;
+
    if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
       return false;
 
+   if (!util_is_power_of_two_or_zero(sample_count))
+      return false;
+
    assert(target == PIPE_BUFFER ||
           target == PIPE_TEXTURE_1D ||
           target == PIPE_TEXTURE_1D_ARRAY ||
@@ -595,22 +679,22 @@ virgl_is_format_supported( struct pipe_screen *screen,
 
    format_desc = util_format_description(format);
    if (!format_desc)
-      return FALSE;
+      return false;
 
    if (util_format_is_intensity(format))
-      return FALSE;
+      return false;
 
    if (sample_count > 1) {
-      if (!vscreen->caps.caps.v1.bset.texture_multisample)
-         return FALSE;
+      if (!caps->v1.bset.texture_multisample)
+         return false;
 
       if (bind & PIPE_BIND_SHADER_IMAGE) {
-         if (sample_count > vscreen->caps.caps.v2.max_image_samples)
-            return FALSE;
+         if (sample_count > caps->v2.max_image_samples)
+            return false;
       }
 
-      if (sample_count > vscreen->caps.caps.v1.max_samples)
-         return FALSE;
+      if (sample_count > caps->v1.max_samples)
+         return false;
    }
 
    if (bind & PIPE_BIND_VERTEX_BUFFER) {
@@ -618,20 +702,21 @@ virgl_is_format_supported( struct pipe_screen *screen,
    }
 
    if (util_format_is_compressed(format) && target == PIPE_BUFFER)
-      return FALSE;
+      return false;
 
    /* Allow 3-comp 32 bit textures only for TBOs (needed for ARB_tbo_rgb32) */
    if ((format == PIPE_FORMAT_R32G32B32_FLOAT ||
        format == PIPE_FORMAT_R32G32B32_SINT ||
        format == PIPE_FORMAT_R32G32B32_UINT) &&
        target != PIPE_BUFFER)
-      return FALSE;
+      return false;
 
    if ((format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC ||
         format_desc->layout == UTIL_FORMAT_LAYOUT_ETC ||
         format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) &&
        target == PIPE_TEXTURE_3D)
-      return FALSE;
+      return false;
+
 
    if (bind & PIPE_BIND_RENDER_TARGET) {
       /* For ARB_framebuffer_no_attachments. */
@@ -639,28 +724,31 @@ virgl_is_format_supported( struct pipe_screen *screen,
          return TRUE;
 
       if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
-         return FALSE;
+         return false;
 
       /*
        * Although possible, it is unnatural to render into compressed or YUV
        * surfaces. So disable these here to avoid going into weird paths
-       * inside the state trackers.
+       * inside gallium frontends.
        */
       if (format_desc->block.width != 1 ||
           format_desc->block.height != 1)
-         return FALSE;
+         return false;
 
-      {
-         int big = format / 32;
-         int small = format % 32;
-         if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
-            return FALSE;
-      }
+      if (!virgl_format_check_bitmask(format,
+                                      caps->v1.render.bitmask,
+                                      may_emulate_bgra))
+         return false;
    }
 
    if (bind & PIPE_BIND_DEPTH_STENCIL) {
       if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
-         return FALSE;
+         return false;
+   }
+
+   if (bind & PIPE_BIND_SCANOUT) {
+      if (!virgl_format_check_bitmask(format, caps->v2.scanout.bitmask, false))
+         return false;
    }
 
    /*
@@ -676,6 +764,9 @@ virgl_is_format_supported( struct pipe_screen *screen,
    if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
       goto out_lookup;
    }
+   if (format_desc->layout == UTIL_FORMAT_LAYOUT_ETC) {
+      goto out_lookup;
+   }
 
    if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
       goto out_lookup;
@@ -691,23 +782,16 @@ virgl_is_format_supported( struct pipe_screen *screen,
    }
 
    if (i == 4)
-      return FALSE;
+      return false;
 
    /* no L4A4 */
    if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
-      return FALSE;
+      return false;
 
  out_lookup:
-   {
-      int big = format / 32;
-      int small = format % 32;
-      if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
-         return FALSE;
-   }
-   /*
-    * Everything else should be supported by u_format.
-    */
-   return TRUE;
+   return virgl_format_check_bitmask(format,
+                                     caps->v1.sampler.bitmask,
+                                     may_emulate_bgra);
 }
 
 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
@@ -734,10 +818,10 @@ static void virgl_fence_reference(struct pipe_screen *screen,
    vws->fence_reference(vws, ptr, fence);
 }
 
-static boolean virgl_fence_finish(struct pipe_screen *screen,
-                                  struct pipe_context *ctx,
-                                  struct pipe_fence_handle *fence,
-                                  uint64_t timeout)
+static bool virgl_fence_finish(struct pipe_screen *screen,
+                               struct pipe_context *ctx,
+                               struct pipe_fence_handle *fence,
+                               uint64_t timeout)
 {
    struct virgl_screen *vscreen = virgl_screen(screen);
    struct virgl_winsys *vws = vscreen->vws;
@@ -773,16 +857,48 @@ virgl_destroy_screen(struct pipe_screen *screen)
    FREE(vscreen);
 }
 
+static void
+fixup_formats(union virgl_caps *caps, struct virgl_supported_format_mask *mask)
+{
+   const size_t size = ARRAY_SIZE(mask->bitmask);
+   for (int i = 0; i < size; ++i) {
+      if (mask->bitmask[i] != 0)
+         return; /* we got some formats, we definately have a new protocol */
+   }
+
+   /* old protocol used; fall back to considering all sampleable formats valid
+    * readback-formats
+    */
+   for (int i = 0; i < size; ++i)
+      mask->bitmask[i] = caps->v1.sampler.bitmask[i];
+}
+
 struct pipe_screen *
-virgl_create_screen(struct virgl_winsys *vws)
+virgl_create_screen(struct virgl_winsys *vws, const struct pipe_screen_config *config)
 {
    struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
 
+   const char *VIRGL_GLES_EMULATE_BGRA = "gles_emulate_bgra";
+   const char *VIRGL_GLES_APPLY_BGRA_DEST_SWIZZLE = "gles_apply_bgra_dest_swizzle";
+   const char *VIRGL_GLES_SAMPLES_PASSED_VALUE = "gles_samples_passed_value";
+
    if (!screen)
       return NULL;
 
    virgl_debug = debug_get_option_virgl_debug();
 
+   if (config && config->options) {
+      screen->tweak_gles_emulate_bgra =
+            driQueryOptionb(config->options, VIRGL_GLES_EMULATE_BGRA);
+      screen->tweak_gles_apply_bgra_dest_swizzle =
+            driQueryOptionb(config->options, VIRGL_GLES_APPLY_BGRA_DEST_SWIZZLE);
+      screen->tweak_gles_tf3_value =
+            driQueryOptioni(config->options, VIRGL_GLES_SAMPLES_PASSED_VALUE);
+   }
+
+   screen->tweak_gles_emulate_bgra |= !!(virgl_debug & VIRGL_DEBUG_EMULATE_BGRA);
+   screen->tweak_gles_apply_bgra_dest_swizzle |= !!(virgl_debug & VIRGL_DEBUG_BGRA_DEST_SWIZZLE);
+
    screen->vws = vws;
    screen->base.get_name = virgl_get_name;
    screen->base.get_vendor = virgl_get_vendor;
@@ -803,6 +919,9 @@ virgl_create_screen(struct virgl_winsys *vws)
    virgl_init_screen_resource_functions(&screen->base);
 
    vws->get_caps(vws, &screen->caps);
+   fixup_formats(&screen->caps.caps,
+                 &screen->caps.caps.v2.supported_readback_formats);
+   fixup_formats(&screen->caps.caps, &screen->caps.caps.v2.scanout);
 
    screen->refcnt = 1;