case PIPE_CAP_VERTEX_COLOR_CLAMPED:
return vscreen->caps.caps.v1.bset.color_clamping;
case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
- return 1;
+ return (vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FBO_MIXED_COLOR_FORMATS) ||
+ (vscreen->caps.caps.v2.host_feature_check_version < 1);
case PIPE_CAP_GLSL_FEATURE_LEVEL:
return vscreen->caps.caps.v1.glsl_level;
case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
case PIPE_CAP_QUERY_TIMESTAMP:
return 1;
case PIPE_CAP_QUERY_TIME_ELAPSED:
- return 0;
+ return 1;
case PIPE_CAP_TGSI_TEXCOORD:
return 0;
case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
case PIPE_CAP_CULL_DISTANCE:
return vscreen->caps.caps.v1.bset.has_cull;
case PIPE_CAP_MAX_VERTEX_STREAMS:
- return vscreen->caps.caps.v1.glsl_level >= 400 ? 4 : 1;
+ return ((vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TRANSFORM_FEEDBACK3) ||
+ (vscreen->caps.caps.v2.host_feature_check_version < 2)) ? 4 : 1;
case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
return vscreen->caps.caps.v1.bset.conditional_render_inverted;
case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
case PIPE_CAP_DOUBLES:
- return vscreen->caps.caps.v1.bset.has_fp64;
+ return vscreen->caps.caps.v1.bset.has_fp64 ||
+ (vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FAKE_FP64);
case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
return vscreen->caps.caps.v2.max_shader_patch_varyings;
case PIPE_CAP_SAMPLER_VIEW_TARGET:
return vscreen->caps.caps.v2.max_combined_atomic_counters;
case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
return vscreen->caps.caps.v2.max_combined_atomic_counter_buffers;
+ case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
+ case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
+ return 1; /* TODO: need to introduce a hw-cap for this */
+ case PIPE_CAP_QUERY_BUFFER_OBJECT:
+ return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_QBO;
+ case PIPE_CAP_MAX_VARYINGS:
+ if (vscreen->caps.caps.v1.glsl_level < 150)
+ return vscreen->caps.caps.v2.max_vertex_attribs;
+ return 32;
+ case PIPE_CAP_FAKE_SW_MSAA:
+ /* If the host supports only one sample (e.g., if it is using softpipe),
+ * fake multisampling to able to advertise higher GL versions. */
+ return (vscreen->caps.caps.v1.max_samples == 1) ? 1 : 0;
case PIPE_CAP_TEXTURE_GATHER_SM5:
case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
- case PIPE_CAP_FAKE_SW_MSAA:
case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
case PIPE_CAP_MULTI_DRAW_INDIRECT:
case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
- case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
- case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
case PIPE_CAP_DEPTH_BOUNDS_TEST:
case PIPE_CAP_SHAREABLE_SHADERS:
case PIPE_CAP_CLEAR_TEXTURE:
case PIPE_CAP_INVALIDATE_BUFFER:
case PIPE_CAP_GENERATE_MIPMAP:
case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
- case PIPE_CAP_QUERY_BUFFER_OBJECT:
case PIPE_CAP_STRING_MARKER:
case PIPE_CAP_QUERY_MEMORY_INFO:
case PIPE_CAP_PCI_GROUP:
case PIPE_CAP_VIDEO_MEMORY:
return 0;
case PIPE_CAP_NATIVE_FENCE_FD:
- return 0;
+ return vscreen->vws->supports_fences;
+ case PIPE_CAP_DEST_SURFACE_SRGB_CONTROL:
+ return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SRGB_WRITE_CONTROL;
default:
return u_pipe_screen_get_param_defaults(screen, param);
}
return virgl_is_vertex_format_supported(screen, format);
}
+ if (util_format_is_compressed(format) && target == PIPE_BUFFER)
+ return FALSE;
+
/* Allow 3-comp 32 bit textures only for TBOs (needed for ARB_tbo_rgb32) */
if ((format == PIPE_FORMAT_R32G32B32_FLOAT ||
format == PIPE_FORMAT_R32G32B32_SINT ||
target != PIPE_BUFFER)
return FALSE;
+ if ((format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC ||
+ format_desc->layout == UTIL_FORMAT_LAYOUT_ETC ||
+ format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) &&
+ target == PIPE_TEXTURE_3D)
+ return FALSE;
+
if (bind & PIPE_BIND_RENDER_TARGET) {
/* For ARB_framebuffer_no_attachments. */
if (format == PIPE_FORMAT_NONE)
return vws->fence_wait(vws, fence, timeout);
}
+static int virgl_fence_get_fd(struct pipe_screen *screen,
+ struct pipe_fence_handle *fence)
+{
+ struct virgl_screen *vscreen = virgl_screen(screen);
+ struct virgl_winsys *vws = vscreen->vws;
+
+ return vws->fence_get_fd(vws, fence);
+}
+
static uint64_t
virgl_get_timestamp(struct pipe_screen *_screen)
{
struct virgl_screen *vscreen = virgl_screen(screen);
struct virgl_winsys *vws = vscreen->vws;
- slab_destroy_parent(&vscreen->texture_transfer_pool);
+ slab_destroy_parent(&vscreen->transfer_pool);
if (vws)
vws->destroy(vws);
screen->base.fence_reference = virgl_fence_reference;
//screen->base.fence_signalled = virgl_fence_signalled;
screen->base.fence_finish = virgl_fence_finish;
+ screen->base.fence_get_fd = virgl_fence_get_fd;
virgl_init_screen_resource_functions(&screen->base);
screen->refcnt = 1;
- slab_create_parent(&screen->texture_transfer_pool, sizeof(struct virgl_transfer), 16);
+ slab_create_parent(&screen->transfer_pool, sizeof(struct virgl_transfer), 16);
return &screen->base;
}