freedreno/ir3: add ctx->mem_to_mem()
[mesa.git] / src / gallium / drivers / virgl / virgl_screen.c
index 46b3bd3fd090f494f8fed38733cde900b842ebef..725f7dbed440bc27350ca58c8742481534bcb3b8 100644 (file)
@@ -24,7 +24,7 @@
 #include "util/u_format.h"
 #include "util/u_format_s3tc.h"
 #include "util/u_video.h"
-#include "os/os_time.h"
+#include "util/os_time.h"
 #include "pipe/p_defines.h"
 #include "pipe/p_screen.h"
 
@@ -269,6 +269,10 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_QUERY_SO_OVERFLOW:
    case PIPE_CAP_MEMOBJ:
    case PIPE_CAP_LOAD_CONSTBUF:
+   case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
+   case PIPE_CAP_TILE_RASTER_ORDER:
+   case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
+   case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
       return 0;
    case PIPE_CAP_VENDOR_ID:
       return 0x1af4;
@@ -335,7 +339,10 @@ virgl_get_shader_param(struct pipe_screen *screen,
          return 4096 * sizeof(float[4]);
       case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
       case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
+      case PIPE_SHADER_CAP_INT64_ATOMICS:
       case PIPE_SHADER_CAP_FP16:
+      case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
+      case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
       default:
          return 0;
       }
@@ -485,9 +492,7 @@ virgl_is_format_supported( struct pipe_screen *screen,
     */
 
    if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
-      if (util_format_s3tc_enabled)
-         goto out_lookup;
-      return FALSE;
+      goto out_lookup;
    }
    if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
       goto out_lookup;
@@ -614,6 +619,5 @@ virgl_create_screen(struct virgl_winsys *vws)
 
    slab_create_parent(&screen->texture_transfer_pool, sizeof(struct virgl_transfer), 16);
 
-   util_format_s3tc_init();
    return &screen->base;
 }