unsigned num_elements,
const struct pipe_vertex_element *elements)
{
+ struct zink_screen *screen = zink_screen(pctx->screen);
unsigned int i;
struct zink_vertex_elements_state *ves = CALLOC_STRUCT(zink_vertex_elements_state);
if (!ves)
ves->hw_state.attribs[i].binding = binding;
ves->hw_state.attribs[i].location = i; // TODO: unsure
- ves->hw_state.attribs[i].format = zink_get_format(elem->src_format);
+ ves->hw_state.attribs[i].format = zink_get_format(screen,
+ elem->src_format);
assert(ves->hw_state.attribs[i].format != VK_FORMAT_UNDEFINED);
ves->hw_state.attribs[i].offset = elem->src_offset;
}
struct zink_context *ctx = zink_context(pctx);
ctx->rast_state = cso;
- if (ctx->rast_state)
+ if (ctx->rast_state) {
ctx->gfx_pipeline_state.rast_state = &ctx->rast_state->hw_state;
+ ctx->line_width = ctx->rast_state->line_width;
+ }
}
static void