/**************************************************************************
*
- * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * Copyright 2007 VMware, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* - A negative value always means failure.
* - The meaning of a positive value is function dependent.
*/
-enum pipe_error {
+enum pipe_error
+{
PIPE_OK = 0,
PIPE_ERROR = -1, /**< Generic error */
PIPE_ERROR_BAD_INPUT = -2,
#define PIPE_STENCIL_OP_INVERT 7
/** Texture types.
- * See the documentation for info on PIPE_TEXTURE_RECT vs PIPE_TEXTURE_2D */
-enum pipe_texture_target {
+ * See the documentation for info on PIPE_TEXTURE_RECT vs PIPE_TEXTURE_2D
+ */
+enum pipe_texture_target
+{
PIPE_BUFFER = 0,
PIPE_TEXTURE_1D = 1,
PIPE_TEXTURE_2D = 2,
#define PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE 6
#define PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER 7
-/* Between mipmaps, ie mipfilter
- */
+/** Between mipmaps, ie mipfilter */
#define PIPE_TEX_MIPFILTER_NEAREST 0
#define PIPE_TEX_MIPFILTER_LINEAR 1
#define PIPE_TEX_MIPFILTER_NONE 2
-/* Within a mipmap, ie min/mag filter
- */
+/** Within a mipmap, ie min/mag filter */
#define PIPE_TEX_FILTER_NEAREST 0
#define PIPE_TEX_FILTER_LINEAR 1
/**
* Clear buffer bits
*/
+#define PIPE_CLEAR_DEPTH (1 << 0)
+#define PIPE_CLEAR_STENCIL (1 << 1)
+#define PIPE_CLEAR_COLOR0 (1 << 2)
+#define PIPE_CLEAR_COLOR1 (1 << 3)
+#define PIPE_CLEAR_COLOR2 (1 << 4)
+#define PIPE_CLEAR_COLOR3 (1 << 5)
+#define PIPE_CLEAR_COLOR4 (1 << 6)
+#define PIPE_CLEAR_COLOR5 (1 << 7)
+#define PIPE_CLEAR_COLOR6 (1 << 8)
+#define PIPE_CLEAR_COLOR7 (1 << 9)
+/** Combined flags */
/** All color buffers currently bound */
-#define PIPE_CLEAR_COLOR (1 << 0)
-#define PIPE_CLEAR_DEPTH (1 << 1)
-#define PIPE_CLEAR_STENCIL (1 << 2)
-/** Depth/stencil combined */
+#define PIPE_CLEAR_COLOR (PIPE_CLEAR_COLOR0 | PIPE_CLEAR_COLOR1 | \
+ PIPE_CLEAR_COLOR2 | PIPE_CLEAR_COLOR3 | \
+ PIPE_CLEAR_COLOR4 | PIPE_CLEAR_COLOR5 | \
+ PIPE_CLEAR_COLOR6 | PIPE_CLEAR_COLOR7)
#define PIPE_CLEAR_DEPTHSTENCIL (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)
/**
* Transfer object usage flags
*/
-enum pipe_transfer_usage {
+enum pipe_transfer_usage
+{
/**
* Resource contents read back (or accessed directly) at transfer
* create time.
* - D3D10 DDI's D3D10_DDI_MAP_WRITE_DISCARD flag
* - D3D10's D3D10_MAP_WRITE_DISCARD flag.
*/
- PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE = (1 << 12)
+ PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE = (1 << 12),
+ /**
+ * Allows the resource to be used for rendering while mapped.
+ *
+ * PIPE_RESOURCE_FLAG_MAP_PERSISTENT must be set when creating
+ * the resource.
+ *
+ * If COHERENT is not set, memory_barrier(PIPE_BARRIER_MAPPED_BUFFER)
+ * must be called to ensure the device can see what the CPU has written.
+ */
+ PIPE_TRANSFER_PERSISTENT = (1 << 13),
+
+ /**
+ * If PERSISTENT is set, this ensures any writes done by the device are
+ * immediately visible to the CPU and vice versa.
+ *
+ * PIPE_RESOURCE_FLAG_MAP_COHERENT must be set when creating
+ * the resource.
+ */
+ PIPE_TRANSFER_COHERENT = (1 << 14)
};
/**
* Flags for the flush function.
*/
-enum pipe_flush_flags {
+enum pipe_flush_flags
+{
PIPE_FLUSH_END_OF_FRAME = (1 << 0)
};
-/*
+/**
+ * Flags for pipe_context::memory_barrier.
+ */
+#define PIPE_BARRIER_MAPPED_BUFFER (1 << 0)
+
+/**
* Resource binding flags -- state tracker must specify in advance all
* the ways a resource might be used.
*/
#define PIPE_BIND_VERTEX_BUFFER (1 << 4) /* set_vertex_buffers */
#define PIPE_BIND_INDEX_BUFFER (1 << 5) /* draw_elements */
#define PIPE_BIND_CONSTANT_BUFFER (1 << 6) /* set_constant_buffer */
-#define PIPE_BIND_DISPLAY_TARGET (1 << 8) /* flush_front_buffer */
-#define PIPE_BIND_TRANSFER_WRITE (1 << 9) /* transfer_map */
-#define PIPE_BIND_TRANSFER_READ (1 << 10) /* transfer_map */
-#define PIPE_BIND_STREAM_OUTPUT (1 << 11) /* set_stream_output_buffers */
-#define PIPE_BIND_CURSOR (1 << 16) /* mouse cursor */
-#define PIPE_BIND_CUSTOM (1 << 17) /* state-tracker/winsys usages */
-#define PIPE_BIND_GLOBAL (1 << 18) /* set_global_binding */
-#define PIPE_BIND_SHADER_RESOURCE (1 << 19) /* set_shader_resources */
-#define PIPE_BIND_COMPUTE_RESOURCE (1 << 20) /* set_compute_resources */
-
-/* The first two flags above were previously part of the amorphous
+#define PIPE_BIND_DISPLAY_TARGET (1 << 7) /* flush_front_buffer */
+#define PIPE_BIND_TRANSFER_WRITE (1 << 8) /* transfer_map */
+#define PIPE_BIND_TRANSFER_READ (1 << 9) /* transfer_map */
+#define PIPE_BIND_STREAM_OUTPUT (1 << 10) /* set_stream_output_buffers */
+#define PIPE_BIND_CURSOR (1 << 11) /* mouse cursor */
+#define PIPE_BIND_CUSTOM (1 << 12) /* state-tracker/winsys usages */
+#define PIPE_BIND_GLOBAL (1 << 13) /* set_global_binding */
+#define PIPE_BIND_SHADER_RESOURCE (1 << 14) /* set_shader_resources */
+#define PIPE_BIND_COMPUTE_RESOURCE (1 << 15) /* set_compute_resources */
+#define PIPE_BIND_COMMAND_ARGS_BUFFER (1 << 16) /* pipe_draw_info.indirect */
+
+/**
+ * The first two flags above were previously part of the amorphous
* TEXTURE_USAGE, most of which are now descriptions of the ways a
* particular texture can be bound to the gallium pipeline. The two flags
* below do not fit within that and probably need to be migrated to some
* The shared flag is quite underspecified, but certainly isn't a
* binding flag - it seems more like a message to the winsys to create
* a shareable allocation.
+ *
+ * The third flag has been added to be able to force textures to be created
+ * in linear mode (no tiling).
*/
-#define PIPE_BIND_SCANOUT (1 << 14) /* */
-#define PIPE_BIND_SHARED (1 << 15) /* get_texture_handle ??? */
+#define PIPE_BIND_SCANOUT (1 << 17) /* */
+#define PIPE_BIND_SHARED (1 << 18) /* get_texture_handle ??? */
+#define PIPE_BIND_LINEAR (1 << 19)
-/* Flags for the driver about resource behaviour:
+/**
+ * Flags for the driver about resource behaviour:
*/
-#define PIPE_RESOURCE_FLAG_GEN_MIPS (1 << 0) /* Driver performs autogen mips */
+#define PIPE_RESOURCE_FLAG_MAP_PERSISTENT (1 << 0)
+#define PIPE_RESOURCE_FLAG_MAP_COHERENT (1 << 1)
#define PIPE_RESOURCE_FLAG_DRV_PRIV (1 << 16) /* driver/winsys private */
#define PIPE_RESOURCE_FLAG_ST_PRIV (1 << 24) /* state-tracker/winsys private */
-/* Hint about the expected lifecycle of a resource.
+/**
+ * Hint about the expected lifecycle of a resource.
+ * Sorted according to GPU vs CPU access.
*/
-#define PIPE_USAGE_DEFAULT 0 /* many uploads, draws intermixed */
-#define PIPE_USAGE_DYNAMIC 1 /* many uploads, draws intermixed */
-#define PIPE_USAGE_STATIC 2 /* same as immutable?? */
-#define PIPE_USAGE_IMMUTABLE 3 /* no change after first upload */
-#define PIPE_USAGE_STREAM 4 /* upload, draw, upload, draw */
-#define PIPE_USAGE_STAGING 5 /* supports data transfers from the GPU to the CPU */
+#define PIPE_USAGE_DEFAULT 0 /* fast GPU access */
+#define PIPE_USAGE_IMMUTABLE 1 /* fast GPU access, immutable */
+#define PIPE_USAGE_DYNAMIC 2 /* uploaded data is used multiple times */
+#define PIPE_USAGE_STREAM 3 /* uploaded data is used once */
+#define PIPE_USAGE_STAGING 4 /* fast CPU access */
/**
#define PIPE_SHADER_VERTEX 0
#define PIPE_SHADER_FRAGMENT 1
#define PIPE_SHADER_GEOMETRY 2
-#define PIPE_SHADER_COMPUTE 3
-#define PIPE_SHADER_TYPES 4
+#define PIPE_SHADER_TESS_CTRL 3
+#define PIPE_SHADER_TESS_EVAL 4
+#define PIPE_SHADER_COMPUTE 5
+#define PIPE_SHADER_TYPES 6
/**
* Primitive types:
*/
-#define PIPE_PRIM_POINTS 0
-#define PIPE_PRIM_LINES 1
-#define PIPE_PRIM_LINE_LOOP 2
-#define PIPE_PRIM_LINE_STRIP 3
-#define PIPE_PRIM_TRIANGLES 4
-#define PIPE_PRIM_TRIANGLE_STRIP 5
-#define PIPE_PRIM_TRIANGLE_FAN 6
-#define PIPE_PRIM_QUADS 7
-#define PIPE_PRIM_QUAD_STRIP 8
-#define PIPE_PRIM_POLYGON 9
+#define PIPE_PRIM_POINTS 0
+#define PIPE_PRIM_LINES 1
+#define PIPE_PRIM_LINE_LOOP 2
+#define PIPE_PRIM_LINE_STRIP 3
+#define PIPE_PRIM_TRIANGLES 4
+#define PIPE_PRIM_TRIANGLE_STRIP 5
+#define PIPE_PRIM_TRIANGLE_FAN 6
+#define PIPE_PRIM_QUADS 7
+#define PIPE_PRIM_QUAD_STRIP 8
+#define PIPE_PRIM_POLYGON 9
#define PIPE_PRIM_LINES_ADJACENCY 10
-#define PIPE_PRIM_LINE_STRIP_ADJACENCY 11
+#define PIPE_PRIM_LINE_STRIP_ADJACENCY 11
#define PIPE_PRIM_TRIANGLES_ADJACENCY 12
#define PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY 13
-#define PIPE_PRIM_MAX 14
+#define PIPE_PRIM_PATCHES 14
+#define PIPE_PRIM_MAX 15
+/**
+ * Tessellator spacing types
+ */
+#define PIPE_TESS_SPACING_FRACTIONAL_ODD 0
+#define PIPE_TESS_SPACING_FRACTIONAL_EVEN 1
+#define PIPE_TESS_SPACING_EQUAL 2
+
/**
* Query object types
*/
#define PIPE_QUERY_GPU_FINISHED 9
#define PIPE_QUERY_PIPELINE_STATISTICS 10
#define PIPE_QUERY_TYPES 11
+/* start of driver queries, see pipe_screen::get_driver_query_info */
+#define PIPE_QUERY_DRIVER_SPECIFIC 256
/**
#define PIPE_TIMEOUT_INFINITE 0xffffffffffffffffull
+
+/**
+ * Device reset status.
+ */
+enum pipe_reset_status
+{
+ PIPE_NO_RESET = 0,
+ PIPE_GUILTY_CONTEXT_RESET = 1,
+ PIPE_INNOCENT_CONTEXT_RESET = 2,
+ PIPE_UNKNOWN_CONTEXT_RESET = 3
+};
+
+
/**
* Implementation capabilities/limits which are queried through
* pipe_screen::get_param()
*/
-enum pipe_cap {
- PIPE_CAP_NPOT_TEXTURES = 1,
- PIPE_CAP_TWO_SIDED_STENCIL = 2,
- PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS = 4,
- PIPE_CAP_ANISOTROPIC_FILTER = 5,
- PIPE_CAP_POINT_SPRITE = 6,
- PIPE_CAP_MAX_RENDER_TARGETS = 7,
- PIPE_CAP_OCCLUSION_QUERY = 8,
- PIPE_CAP_QUERY_TIME_ELAPSED = 9,
- PIPE_CAP_TEXTURE_SHADOW_MAP = 10,
- PIPE_CAP_TEXTURE_SWIZZLE = 11,
- PIPE_CAP_MAX_TEXTURE_2D_LEVELS = 12,
- PIPE_CAP_MAX_TEXTURE_3D_LEVELS = 13,
- PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS = 14,
- PIPE_CAP_TEXTURE_MIRROR_CLAMP = 25,
- PIPE_CAP_BLEND_EQUATION_SEPARATE = 28,
- PIPE_CAP_SM3 = 29, /*< Shader Model, supported */
- PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS = 30,
- PIPE_CAP_PRIMITIVE_RESTART = 31,
- /** Maximum texture image units accessible from vertex and fragment shaders
- * combined */
- PIPE_CAP_MAX_COMBINED_SAMPLERS = 32,
+enum pipe_cap
+{
+ PIPE_CAP_NPOT_TEXTURES,
+ PIPE_CAP_TWO_SIDED_STENCIL,
+ PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS,
+ PIPE_CAP_ANISOTROPIC_FILTER,
+ PIPE_CAP_POINT_SPRITE,
+ PIPE_CAP_MAX_RENDER_TARGETS,
+ PIPE_CAP_OCCLUSION_QUERY,
+ PIPE_CAP_QUERY_TIME_ELAPSED,
+ PIPE_CAP_TEXTURE_SHADOW_MAP,
+ PIPE_CAP_TEXTURE_SWIZZLE,
+ PIPE_CAP_MAX_TEXTURE_2D_LEVELS,
+ PIPE_CAP_MAX_TEXTURE_3D_LEVELS,
+ PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS,
+ PIPE_CAP_TEXTURE_MIRROR_CLAMP,
+ PIPE_CAP_BLEND_EQUATION_SEPARATE,
+ PIPE_CAP_SM3,
+ PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS,
+ PIPE_CAP_PRIMITIVE_RESTART,
/** blend enables and write masks per rendertarget */
- PIPE_CAP_INDEP_BLEND_ENABLE = 33,
+ PIPE_CAP_INDEP_BLEND_ENABLE,
/** different blend funcs per rendertarget */
- PIPE_CAP_INDEP_BLEND_FUNC = 34,
- PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS = 36,
- PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT = 37,
- PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT = 38,
- PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER = 39,
- PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER = 40,
- PIPE_CAP_DEPTH_CLIP_DISABLE = 41,
- PIPE_CAP_SHADER_STENCIL_EXPORT = 42,
- PIPE_CAP_TGSI_INSTANCEID = 43,
- PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR = 44,
- PIPE_CAP_FRAGMENT_COLOR_CLAMPED = 45,
- PIPE_CAP_MIXED_COLORBUFFER_FORMATS = 46,
- PIPE_CAP_SEAMLESS_CUBE_MAP = 47,
- PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE = 48,
- PIPE_CAP_SCALED_RESOLVE = 49,
- PIPE_CAP_MIN_TEXEL_OFFSET = 50,
- PIPE_CAP_MAX_TEXEL_OFFSET = 51,
- PIPE_CAP_CONDITIONAL_RENDER = 52,
- PIPE_CAP_TEXTURE_BARRIER = 53,
- PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS = 55,
- PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS = 56,
- PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME = 57,
- PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS = 58, /* temporary */
- PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS = 59, /* temporary */
- PIPE_CAP_VERTEX_COLOR_UNCLAMPED = 60,
- PIPE_CAP_VERTEX_COLOR_CLAMPED = 61,
- PIPE_CAP_GLSL_FEATURE_LEVEL = 62,
- PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION = 63,
- PIPE_CAP_USER_VERTEX_BUFFERS = 64,
- PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY = 65,
- PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY = 66,
- PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY = 67,
- PIPE_CAP_COMPUTE = 68,
- PIPE_CAP_USER_INDEX_BUFFERS = 69,
- PIPE_CAP_USER_CONSTANT_BUFFERS = 70,
- PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT = 71,
- PIPE_CAP_START_INSTANCE = 72,
- PIPE_CAP_QUERY_TIMESTAMP = 73,
- PIPE_CAP_TEXTURE_MULTISAMPLE = 74,
- PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT = 75,
- PIPE_CAP_CUBE_MAP_ARRAY = 76,
- PIPE_CAP_TEXTURE_BUFFER_OBJECTS = 77,
- PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT = 78
+ PIPE_CAP_INDEP_BLEND_FUNC,
+ PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS,
+ PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT,
+ PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT,
+ PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER,
+ PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER,
+ PIPE_CAP_DEPTH_CLIP_DISABLE,
+ PIPE_CAP_SHADER_STENCIL_EXPORT,
+ PIPE_CAP_TGSI_INSTANCEID,
+ PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR,
+ PIPE_CAP_FRAGMENT_COLOR_CLAMPED,
+ PIPE_CAP_MIXED_COLORBUFFER_FORMATS,
+ PIPE_CAP_SEAMLESS_CUBE_MAP,
+ PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE,
+ PIPE_CAP_MIN_TEXEL_OFFSET,
+ PIPE_CAP_MAX_TEXEL_OFFSET,
+ PIPE_CAP_CONDITIONAL_RENDER,
+ PIPE_CAP_TEXTURE_BARRIER,
+ PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS,
+ PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS,
+ PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME,
+ PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS,
+ PIPE_CAP_VERTEX_COLOR_UNCLAMPED,
+ PIPE_CAP_VERTEX_COLOR_CLAMPED,
+ PIPE_CAP_GLSL_FEATURE_LEVEL,
+ PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION,
+ PIPE_CAP_USER_VERTEX_BUFFERS,
+ PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY,
+ PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY,
+ PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY,
+ PIPE_CAP_COMPUTE,
+ PIPE_CAP_USER_INDEX_BUFFERS,
+ PIPE_CAP_USER_CONSTANT_BUFFERS,
+ PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT,
+ PIPE_CAP_START_INSTANCE,
+ PIPE_CAP_QUERY_TIMESTAMP,
+ PIPE_CAP_TEXTURE_MULTISAMPLE,
+ PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT,
+ PIPE_CAP_CUBE_MAP_ARRAY,
+ PIPE_CAP_TEXTURE_BUFFER_OBJECTS,
+ PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT,
+ PIPE_CAP_TGSI_TEXCOORD,
+ PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER,
+ PIPE_CAP_QUERY_PIPELINE_STATISTICS,
+ PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK,
+ PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE,
+ PIPE_CAP_MAX_VIEWPORTS,
+ PIPE_CAP_ENDIANNESS,
+ PIPE_CAP_MIXED_FRAMEBUFFER_SIZES,
+ PIPE_CAP_TGSI_VS_LAYER_VIEWPORT,
+ PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES,
+ PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS,
+ PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS,
+ PIPE_CAP_TEXTURE_GATHER_SM5,
+ PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT,
+ PIPE_CAP_FAKE_SW_MSAA,
+ PIPE_CAP_TEXTURE_QUERY_LOD,
+ PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET,
+ PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET,
+ PIPE_CAP_SAMPLE_SHADING,
+ PIPE_CAP_TEXTURE_GATHER_OFFSETS,
+ PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION,
+ PIPE_CAP_MAX_VERTEX_STREAMS,
+ PIPE_CAP_DRAW_INDIRECT,
+ PIPE_CAP_TGSI_FS_FINE_DERIVATIVE,
+ PIPE_CAP_VENDOR_ID,
+ PIPE_CAP_DEVICE_ID,
+ PIPE_CAP_ACCELERATED,
+ PIPE_CAP_VIDEO_MEMORY,
+ PIPE_CAP_UMA,
+ PIPE_CAP_CONDITIONAL_RENDER_INVERTED,
+ PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE,
+ PIPE_CAP_SAMPLER_VIEW_TARGET,
+ PIPE_CAP_CLIP_HALFZ,
+ PIPE_CAP_VERTEXID_NOBASE,
+ PIPE_CAP_POLYGON_OFFSET_CLAMP,
+ PIPE_CAP_MULTISAMPLE_Z_RESOLVE,
+ PIPE_CAP_RESOURCE_FROM_USER_MEMORY,
+ PIPE_CAP_DEVICE_RESET_STATUS_QUERY,
+ PIPE_CAP_MAX_SHADER_PATCH_VARYINGS,
+};
+
+#define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 (1 << 0)
+#define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 (1 << 1)
+
+enum pipe_endian
+{
+ PIPE_ENDIAN_LITTLE = 0,
+ PIPE_ENDIAN_BIG = 1,
+#if defined(PIPE_ARCH_LITTLE_ENDIAN)
+ PIPE_ENDIAN_NATIVE = PIPE_ENDIAN_LITTLE
+#elif defined(PIPE_ARCH_BIG_ENDIAN)
+ PIPE_ENDIAN_NATIVE = PIPE_ENDIAN_BIG
+#endif
};
/**
*/
enum pipe_capf
{
- PIPE_CAPF_MAX_LINE_WIDTH = 15,
- PIPE_CAPF_MAX_LINE_WIDTH_AA = 16,
- PIPE_CAPF_MAX_POINT_WIDTH = 17,
- PIPE_CAPF_MAX_POINT_WIDTH_AA = 18,
- PIPE_CAPF_MAX_TEXTURE_ANISOTROPY = 19,
- PIPE_CAPF_MAX_TEXTURE_LOD_BIAS = 20,
- PIPE_CAPF_GUARD_BAND_LEFT = 21,
- PIPE_CAPF_GUARD_BAND_TOP = 22,
- PIPE_CAPF_GUARD_BAND_RIGHT = 23,
- PIPE_CAPF_GUARD_BAND_BOTTOM = 24
+ PIPE_CAPF_MAX_LINE_WIDTH,
+ PIPE_CAPF_MAX_LINE_WIDTH_AA,
+ PIPE_CAPF_MAX_POINT_WIDTH,
+ PIPE_CAPF_MAX_POINT_WIDTH_AA,
+ PIPE_CAPF_MAX_TEXTURE_ANISOTROPY,
+ PIPE_CAPF_MAX_TEXTURE_LOD_BIAS,
+ PIPE_CAPF_GUARD_BAND_LEFT,
+ PIPE_CAPF_GUARD_BAND_TOP,
+ PIPE_CAPF_GUARD_BAND_RIGHT,
+ PIPE_CAPF_GUARD_BAND_BOTTOM
};
-/* Shader caps not specific to any single stage */
+/** Shader caps not specific to any single stage */
enum pipe_shader_cap
{
- PIPE_SHADER_CAP_MAX_INSTRUCTIONS = 0, /* if 0, it means the stage is unsupported */
- PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS = 1,
- PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS = 2,
- PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS = 3,
- PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH = 4,
- PIPE_SHADER_CAP_MAX_INPUTS = 5,
- PIPE_SHADER_CAP_MAX_CONSTS = 6,
- PIPE_SHADER_CAP_MAX_CONST_BUFFERS = 7,
- PIPE_SHADER_CAP_MAX_TEMPS = 8,
- PIPE_SHADER_CAP_MAX_ADDRS = 9,
- PIPE_SHADER_CAP_MAX_PREDS = 10,
+ PIPE_SHADER_CAP_MAX_INSTRUCTIONS, /* if 0, it means the stage is unsupported */
+ PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS,
+ PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS,
+ PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS,
+ PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH,
+ PIPE_SHADER_CAP_MAX_INPUTS,
+ PIPE_SHADER_CAP_MAX_OUTPUTS,
+ PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE,
+ PIPE_SHADER_CAP_MAX_CONST_BUFFERS,
+ PIPE_SHADER_CAP_MAX_TEMPS,
+ PIPE_SHADER_CAP_MAX_PREDS,
/* boolean caps */
- PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED = 11,
- PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR = 12,
- PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR = 13,
- PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR = 14,
- PIPE_SHADER_CAP_INDIRECT_CONST_ADDR = 15,
- PIPE_SHADER_CAP_SUBROUTINES = 16, /* BGNSUB, ENDSUB, CAL, RET */
- PIPE_SHADER_CAP_INTEGERS = 17,
- PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS = 18,
- PIPE_SHADER_CAP_PREFERRED_IR = 19,
- PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED = 20
+ PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED,
+ PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR,
+ PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR,
+ PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR,
+ PIPE_SHADER_CAP_INDIRECT_CONST_ADDR,
+ PIPE_SHADER_CAP_SUBROUTINES, /* BGNSUB, ENDSUB, CAL, RET */
+ PIPE_SHADER_CAP_INTEGERS,
+ PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS,
+ PIPE_SHADER_CAP_PREFERRED_IR,
+ PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED,
+ PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS,
+ PIPE_SHADER_CAP_DOUBLES,
+ PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED, /* all rounding modes */
+ PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED,
+ PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED,
+ PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE
};
/**
enum pipe_shader_ir
{
PIPE_SHADER_IR_TGSI,
- PIPE_SHADER_IR_LLVM
+ PIPE_SHADER_IR_LLVM,
+ PIPE_SHADER_IR_NATIVE
};
/**
PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE,
PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE,
PIPE_COMPUTE_CAP_MAX_INPUT_SIZE,
- PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE
+ PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
+ PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY,
+ PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS,
+ PIPE_COMPUTE_CAP_IMAGES_SUPPORTED,
+ PIPE_COMPUTE_CAP_SUBGROUP_SIZE
};
/**
/* PIPE_QUERY_TIME_ELAPSED */
/* PIPE_QUERY_PRIMITIVES_GENERATED */
/* PIPE_QUERY_PRIMITIVES_EMITTED */
+ /* PIPE_DRIVER_QUERY_TYPE_UINT64 */
uint64_t u64;
+ /* PIPE_DRIVER_QUERY_TYPE_UINT */
+ uint32_t u32;
+
+ /* PIPE_DRIVER_QUERY_TYPE_FLOAT */
+ /* PIPE_DRIVER_QUERY_TYPE_PERCENTAGE */
+ float f;
+
/* PIPE_QUERY_SO_STATISTICS */
struct pipe_query_data_so_statistics so_statistics;
unsigned int ui[4];
};
+enum pipe_driver_query_type
+{
+ PIPE_DRIVER_QUERY_TYPE_UINT64 = 0,
+ PIPE_DRIVER_QUERY_TYPE_UINT = 1,
+ PIPE_DRIVER_QUERY_TYPE_FLOAT = 2,
+ PIPE_DRIVER_QUERY_TYPE_PERCENTAGE = 3,
+ PIPE_DRIVER_QUERY_TYPE_BYTES = 4,
+ PIPE_DRIVER_QUERY_TYPE_MICROSECONDS = 5,
+};
+
+enum pipe_driver_query_group_type
+{
+ PIPE_DRIVER_QUERY_GROUP_TYPE_CPU = 0,
+ PIPE_DRIVER_QUERY_GROUP_TYPE_GPU = 1,
+};
+
+union pipe_numeric_type_union
+{
+ uint64_t u64;
+ uint32_t u32;
+ float f;
+};
+
+struct pipe_driver_query_info
+{
+ const char *name;
+ unsigned query_type; /* PIPE_QUERY_DRIVER_SPECIFIC + i */
+ union pipe_numeric_type_union max_value; /* max value that can be returned */
+ enum pipe_driver_query_type type;
+ unsigned group_id;
+};
+
+struct pipe_driver_query_group_info
+{
+ const char *name;
+ enum pipe_driver_query_group_type type;
+ unsigned max_active_queries;
+ unsigned num_queries;
+};
+
#ifdef __cplusplus
}
#endif
projects / mesa.git / blobdiff