/**************************************************************************
*
- * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * Copyright 2007 VMware, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define PIPE_MASK_Z 0x10
#define PIPE_MASK_S 0x20
#define PIPE_MASK_ZS 0x30
+#define PIPE_MASK_RGBAZS (PIPE_MASK_RGBA|PIPE_MASK_ZS)
/**
PIPE_TEXTURE_RECT = 5,
PIPE_TEXTURE_1D_ARRAY = 6,
PIPE_TEXTURE_2D_ARRAY = 7,
+ PIPE_TEXTURE_CUBE_ARRAY = 8,
PIPE_MAX_TEXTURE_TYPES
};
/**
* Clear buffer bits
*/
+#define PIPE_CLEAR_DEPTH (1 << 0)
+#define PIPE_CLEAR_STENCIL (1 << 1)
+#define PIPE_CLEAR_COLOR0 (1 << 2)
+#define PIPE_CLEAR_COLOR1 (1 << 3)
+#define PIPE_CLEAR_COLOR2 (1 << 4)
+#define PIPE_CLEAR_COLOR3 (1 << 5)
+#define PIPE_CLEAR_COLOR4 (1 << 6)
+#define PIPE_CLEAR_COLOR5 (1 << 7)
+#define PIPE_CLEAR_COLOR6 (1 << 8)
+#define PIPE_CLEAR_COLOR7 (1 << 9)
+/** Combined flags */
/** All color buffers currently bound */
-#define PIPE_CLEAR_COLOR (1 << 0)
-#define PIPE_CLEAR_DEPTH (1 << 1)
-#define PIPE_CLEAR_STENCIL (1 << 2)
-/** Depth/stencil combined */
+#define PIPE_CLEAR_COLOR (PIPE_CLEAR_COLOR0 | PIPE_CLEAR_COLOR1 | \
+ PIPE_CLEAR_COLOR2 | PIPE_CLEAR_COLOR3 | \
+ PIPE_CLEAR_COLOR4 | PIPE_CLEAR_COLOR5 | \
+ PIPE_CLEAR_COLOR6 | PIPE_CLEAR_COLOR7)
#define PIPE_CLEAR_DEPTHSTENCIL (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)
/**
PIPE_TRANSFER_READ = (1 << 0),
/**
- * Resource contents will be written back at transfer_destroy
+ * Resource contents will be written back at transfer_unmap
* time (or modified as a result of being accessed directly).
*/
PIPE_TRANSFER_WRITE = (1 << 1),
* See also:
* - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_RANGE_BIT flag.
*/
- PIPE_TRANSFER_DISCARD = (1 << 8), /* DEPRECATED */
PIPE_TRANSFER_DISCARD_RANGE = (1 << 8),
/**
* - WDDM's D3DDDICB_LOCKFLAGS.IgnoreSync flag.
*/
PIPE_TRANSFER_UNSYNCHRONIZED = (1 << 10),
- PIPE_TRANSFER_NOOVERWRITE = (1 << 10), /* are these really the same?? */
/**
* Written ranges will be notified later with
* - D3D10 DDI's D3D10_DDI_MAP_WRITE_DISCARD flag
* - D3D10's D3D10_MAP_WRITE_DISCARD flag.
*/
- PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE = (1 << 12)
+ PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE = (1 << 12),
+ /**
+ * Allows the resource to be used for rendering while mapped.
+ *
+ * PIPE_RESOURCE_FLAG_MAP_PERSISTENT must be set when creating
+ * the resource.
+ *
+ * If COHERENT is not set, memory_barrier(PIPE_BARRIER_MAPPED_BUFFER)
+ * must be called to ensure the device can see what the CPU has written.
+ */
+ PIPE_TRANSFER_PERSISTENT = (1 << 13),
+
+ /**
+ * If PERSISTENT is set, this ensures any writes done by the device are
+ * immediately visible to the CPU and vice versa.
+ *
+ * PIPE_RESOURCE_FLAG_MAP_COHERENT must be set when creating
+ * the resource.
+ */
+ PIPE_TRANSFER_COHERENT = (1 << 14)
+};
+
+/**
+ * Flags for the flush function.
+ */
+enum pipe_flush_flags {
+ PIPE_FLUSH_END_OF_FRAME = (1 << 0)
};
+/**
+ * Flags for pipe_context::memory_barrier.
+ */
+#define PIPE_BARRIER_MAPPED_BUFFER (1 << 0)
/*
* Resource binding flags -- state tracker must specify in advance all
#define PIPE_BIND_INDEX_BUFFER (1 << 5) /* draw_elements */
#define PIPE_BIND_CONSTANT_BUFFER (1 << 6) /* set_constant_buffer */
#define PIPE_BIND_DISPLAY_TARGET (1 << 8) /* flush_front_buffer */
-#define PIPE_BIND_TRANSFER_WRITE (1 << 9) /* get_transfer */
-#define PIPE_BIND_TRANSFER_READ (1 << 10) /* get_transfer */
+#define PIPE_BIND_TRANSFER_WRITE (1 << 9) /* transfer_map */
+#define PIPE_BIND_TRANSFER_READ (1 << 10) /* transfer_map */
#define PIPE_BIND_STREAM_OUTPUT (1 << 11) /* set_stream_output_buffers */
#define PIPE_BIND_CURSOR (1 << 16) /* mouse cursor */
#define PIPE_BIND_CUSTOM (1 << 17) /* state-tracker/winsys usages */
+#define PIPE_BIND_GLOBAL (1 << 18) /* set_global_binding */
+#define PIPE_BIND_SHADER_RESOURCE (1 << 19) /* set_shader_resources */
+#define PIPE_BIND_COMPUTE_RESOURCE (1 << 20) /* set_compute_resources */
/* The first two flags above were previously part of the amorphous
* TEXTURE_USAGE, most of which are now descriptions of the ways a
* The shared flag is quite underspecified, but certainly isn't a
* binding flag - it seems more like a message to the winsys to create
* a shareable allocation.
+ *
+ * The third flag has been added to be able to force textures to be created
+ * in linear mode (no tiling).
*/
#define PIPE_BIND_SCANOUT (1 << 14) /* */
#define PIPE_BIND_SHARED (1 << 15) /* get_texture_handle ??? */
+#define PIPE_BIND_LINEAR (1 << 21)
/* Flags for the driver about resource behaviour:
*/
-#define PIPE_RESOURCE_FLAG_GEN_MIPS (1 << 0) /* Driver performs autogen mips */
+#define PIPE_RESOURCE_FLAG_MAP_PERSISTENT (1 << 0)
+#define PIPE_RESOURCE_FLAG_MAP_COHERENT (1 << 1)
#define PIPE_RESOURCE_FLAG_DRV_PRIV (1 << 16) /* driver/winsys private */
#define PIPE_RESOURCE_FLAG_ST_PRIV (1 << 24) /* state-tracker/winsys private */
/* Hint about the expected lifecycle of a resource.
+ * Sorted according to GPU vs CPU access.
*/
-#define PIPE_USAGE_DEFAULT 0 /* many uploads, draws intermixed */
-#define PIPE_USAGE_DYNAMIC 1 /* many uploads, draws intermixed */
-#define PIPE_USAGE_STATIC 2 /* same as immutable?? */
-#define PIPE_USAGE_IMMUTABLE 3 /* no change after first upload */
-#define PIPE_USAGE_STREAM 4 /* upload, draw, upload, draw */
-#define PIPE_USAGE_STAGING 5 /* supports data transfers from the GPU to the CPU */
+#define PIPE_USAGE_DEFAULT 0 /* fast GPU access */
+#define PIPE_USAGE_IMMUTABLE 1 /* fast GPU access, immutable */
+#define PIPE_USAGE_DYNAMIC 2 /* uploaded data is used multiple times */
+#define PIPE_USAGE_STREAM 3 /* uploaded data is used once */
+#define PIPE_USAGE_STAGING 4 /* fast CPU access */
/**
#define PIPE_SHADER_VERTEX 0
#define PIPE_SHADER_FRAGMENT 1
#define PIPE_SHADER_GEOMETRY 2
-#define PIPE_SHADER_TYPES 3
+#define PIPE_SHADER_COMPUTE 3
+#define PIPE_SHADER_TYPES 4
/**
#define PIPE_QUERY_PIPELINE_STATISTICS 10
#define PIPE_QUERY_TYPES 11
+/* start of driver queries,
+ * see pipe_screen::get_driver_query_info */
+#define PIPE_QUERY_DRIVER_SPECIFIC 256
+
/**
* Conditional rendering modes
enum pipe_cap {
PIPE_CAP_NPOT_TEXTURES = 1,
PIPE_CAP_TWO_SIDED_STENCIL = 2,
- PIPE_CAP_DUAL_SOURCE_BLEND = 4,
+ PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS = 4,
PIPE_CAP_ANISOTROPIC_FILTER = 5,
PIPE_CAP_POINT_SPRITE = 6,
PIPE_CAP_MAX_RENDER_TARGETS = 7,
PIPE_CAP_OCCLUSION_QUERY = 8,
- PIPE_CAP_TIMER_QUERY = 9,
+ PIPE_CAP_QUERY_TIME_ELAPSED = 9,
PIPE_CAP_TEXTURE_SHADOW_MAP = 10,
PIPE_CAP_TEXTURE_SWIZZLE = 11,
PIPE_CAP_MAX_TEXTURE_2D_LEVELS = 12,
PIPE_CAP_TEXTURE_MIRROR_CLAMP = 25,
PIPE_CAP_BLEND_EQUATION_SEPARATE = 28,
PIPE_CAP_SM3 = 29, /*< Shader Model, supported */
- PIPE_CAP_STREAM_OUTPUT = 30,
+ PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS = 30,
PIPE_CAP_PRIMITIVE_RESTART = 31,
- /** Maximum texture image units accessible from vertex and fragment shaders
- * combined */
- PIPE_CAP_MAX_COMBINED_SAMPLERS = 32,
/** blend enables and write masks per rendertarget */
PIPE_CAP_INDEP_BLEND_ENABLE = 33,
/** different blend funcs per rendertarget */
PIPE_CAP_INDEP_BLEND_FUNC = 34,
- PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE = 35,
PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS = 36,
PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT = 37,
PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT = 38,
PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER = 39,
PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER = 40,
- PIPE_CAP_DEPTH_CLAMP = 41,
+ PIPE_CAP_DEPTH_CLIP_DISABLE = 41,
PIPE_CAP_SHADER_STENCIL_EXPORT = 42,
PIPE_CAP_TGSI_INSTANCEID = 43,
PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR = 44,
- PIPE_CAP_FRAGMENT_COLOR_CLAMP_CONTROL = 45,
+ PIPE_CAP_FRAGMENT_COLOR_CLAMPED = 45,
PIPE_CAP_MIXED_COLORBUFFER_FORMATS = 46,
PIPE_CAP_SEAMLESS_CUBE_MAP = 47,
PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE = 48,
- PIPE_CAP_SCALED_RESOLVE = 49,
PIPE_CAP_MIN_TEXEL_OFFSET = 50,
PIPE_CAP_MAX_TEXEL_OFFSET = 51,
PIPE_CAP_CONDITIONAL_RENDER = 52,
- PIPE_CAP_TEXTURE_BARRIER = 53
+ PIPE_CAP_TEXTURE_BARRIER = 53,
+ PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS = 55,
+ PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS = 56,
+ PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME = 57,
+ PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS = 59, /* temporary */
+ PIPE_CAP_VERTEX_COLOR_UNCLAMPED = 60,
+ PIPE_CAP_VERTEX_COLOR_CLAMPED = 61,
+ PIPE_CAP_GLSL_FEATURE_LEVEL = 62,
+ PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION = 63,
+ PIPE_CAP_USER_VERTEX_BUFFERS = 64,
+ PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY = 65,
+ PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY = 66,
+ PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY = 67,
+ PIPE_CAP_COMPUTE = 68,
+ PIPE_CAP_USER_INDEX_BUFFERS = 69,
+ PIPE_CAP_USER_CONSTANT_BUFFERS = 70,
+ PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT = 71,
+ PIPE_CAP_START_INSTANCE = 72,
+ PIPE_CAP_QUERY_TIMESTAMP = 73,
+ PIPE_CAP_TEXTURE_MULTISAMPLE = 74,
+ PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT = 75,
+ PIPE_CAP_CUBE_MAP_ARRAY = 76,
+ PIPE_CAP_TEXTURE_BUFFER_OBJECTS = 77,
+ PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT = 78,
+ PIPE_CAP_TGSI_TEXCOORD = 79,
+ PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER = 80,
+ PIPE_CAP_QUERY_PIPELINE_STATISTICS = 81,
+ PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK = 82,
+ PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE = 83,
+ PIPE_CAP_MAX_VIEWPORTS = 84,
+ PIPE_CAP_ENDIANNESS = 85,
+ PIPE_CAP_MIXED_FRAMEBUFFER_SIZES = 86,
+ PIPE_CAP_TGSI_VS_LAYER = 87,
+ PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES = 88,
+ PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS = 89,
+ PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS = 90,
+ PIPE_CAP_TEXTURE_GATHER_SM5 = 91,
+ PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT = 92,
+ PIPE_CAP_FAKE_SW_MSAA = 93,
+ PIPE_CAP_TEXTURE_QUERY_LOD = 94,
+};
+
+#define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 (1 << 0)
+#define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 (1 << 1)
+
+enum pipe_endian {
+ PIPE_ENDIAN_LITTLE = 0,
+ PIPE_ENDIAN_BIG = 1,
+#if defined(PIPE_ARCH_LITTLE_ENDIAN)
+ PIPE_ENDIAN_NATIVE = PIPE_ENDIAN_LITTLE
+#elif defined(PIPE_ARCH_BIG_ENDIAN)
+ PIPE_ENDIAN_NATIVE = PIPE_ENDIAN_BIG
+#endif
};
/**
PIPE_SHADER_CAP_SUBROUTINES = 16, /* BGNSUB, ENDSUB, CAL, RET */
PIPE_SHADER_CAP_INTEGERS = 17,
PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS = 18,
- PIPE_SHADER_CAP_OUTPUT_READ = 19
+ PIPE_SHADER_CAP_PREFERRED_IR = 19,
+ PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED = 20,
+ PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS = 21
+};
+
+/**
+ * Shader intermediate representation.
+ */
+enum pipe_shader_ir
+{
+ PIPE_SHADER_IR_TGSI,
+ PIPE_SHADER_IR_LLVM
};
+/**
+ * Compute-specific implementation capability. They can be queried
+ * using pipe_screen::get_compute_param.
+ */
+enum pipe_compute_cap
+{
+ PIPE_COMPUTE_CAP_IR_TARGET,
+ PIPE_COMPUTE_CAP_GRID_DIMENSION,
+ PIPE_COMPUTE_CAP_MAX_GRID_SIZE,
+ PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE,
+ PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK,
+ PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE,
+ PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE,
+ PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE,
+ PIPE_COMPUTE_CAP_MAX_INPUT_SIZE,
+ PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE
+};
/**
* Composite query types
*/
+
+/**
+ * Query result for PIPE_QUERY_SO_STATISTICS.
+ */
struct pipe_query_data_so_statistics
{
uint64_t num_primitives_written;
uint64_t primitives_storage_needed;
};
+
+/**
+ * Query result for PIPE_QUERY_TIMESTAMP_DISJOINT.
+ */
struct pipe_query_data_timestamp_disjoint
{
uint64_t frequency;
boolean disjoint;
};
+/**
+ * Query result for PIPE_QUERY_PIPELINE_STATISTICS.
+ */
+struct pipe_query_data_pipeline_statistics
+{
+ uint64_t ia_vertices; /**< Num vertices read by the vertex fetcher. */
+ uint64_t ia_primitives; /**< Num primitives read by the vertex fetcher. */
+ uint64_t vs_invocations; /**< Num vertex shader invocations. */
+ uint64_t gs_invocations; /**< Num geometry shader invocations. */
+ uint64_t gs_primitives; /**< Num primitives output by a geometry shader. */
+ uint64_t c_invocations; /**< Num primitives sent to the rasterizer. */
+ uint64_t c_primitives; /**< Num primitives that were rendered. */
+ uint64_t ps_invocations; /**< Num pixel shader invocations. */
+ uint64_t hs_invocations; /**< Num hull shader invocations. */
+ uint64_t ds_invocations; /**< Num domain shader invocations. */
+ uint64_t cs_invocations; /**< Num compute shader invocations. */
+};
+
+/**
+ * Query result (returned by pipe_context::get_query_result).
+ */
+union pipe_query_result
+{
+ /* PIPE_QUERY_OCCLUSION_PREDICATE */
+ /* PIPE_QUERY_SO_OVERFLOW_PREDICATE */
+ /* PIPE_QUERY_GPU_FINISHED */
+ boolean b;
+
+ /* PIPE_QUERY_OCCLUSION_COUNTER */
+ /* PIPE_QUERY_TIMESTAMP */
+ /* PIPE_QUERY_TIME_ELAPSED */
+ /* PIPE_QUERY_PRIMITIVES_GENERATED */
+ /* PIPE_QUERY_PRIMITIVES_EMITTED */
+ uint64_t u64;
+
+ /* PIPE_QUERY_SO_STATISTICS */
+ struct pipe_query_data_so_statistics so_statistics;
+
+ /* PIPE_QUERY_TIMESTAMP_DISJOINT */
+ struct pipe_query_data_timestamp_disjoint timestamp_disjoint;
+
+ /* PIPE_QUERY_PIPELINE_STATISTICS */
+ struct pipe_query_data_pipeline_statistics pipeline_statistics;
+};
+
union pipe_color_union
{
float f[4];
unsigned int ui[4];
};
+struct pipe_driver_query_info
+{
+ const char *name;
+ unsigned query_type; /* PIPE_QUERY_DRIVER_SPECIFIC + i */
+ uint64_t max_value; /* max value that can be returned */
+ boolean uses_byte_units; /* whether the result is in bytes */
+};
+
#ifdef __cplusplus
}
#endif
projects / mesa.git / blobdiff