PIPE_POLYGON_MODE_FILL,
PIPE_POLYGON_MODE_LINE,
PIPE_POLYGON_MODE_POINT,
+ PIPE_POLYGON_MODE_FILL_RECTANGLE,
};
/** Polygon face specification, eg for culling */
*
* See also:
* - Direct3D's D3DLOCK_DONOTWAIT flag.
- * - Mesa3D's MESA_MAP_NOWAIT_BIT flag.
+ * - Mesa's MESA_MAP_NOWAIT_BIT flag.
* - WDDM's D3DDDICB_LOCKFLAGS.DonotWait flag.
*/
PIPE_TRANSFER_DONTBLOCK = (1 << 9),
*/
enum pipe_flush_flags
{
- PIPE_FLUSH_END_OF_FRAME = (1 << 0)
+ PIPE_FLUSH_END_OF_FRAME = (1 << 0),
+ PIPE_FLUSH_DEFERRED = (1 << 1),
+ PIPE_FLUSH_FENCE_FD = (1 << 2),
};
/**
* Flags for pipe_context::dump_debug_state.
*/
-#define PIPE_DEBUG_DEVICE_IS_HUNG (1 << 0)
+#define PIPE_DUMP_DEVICE_STATUS_REGISTERS (1 << 0)
+#define PIPE_DUMP_CURRENT_STATES (1 << 1)
+#define PIPE_DUMP_CURRENT_SHADERS (1 << 2)
+#define PIPE_DUMP_LAST_COMMAND_BUFFER (1 << 3)
/**
* Create a compute-only context. Use in pipe_screen::context_create.
#define PIPE_BARRIER_FRAMEBUFFER (1 << 9)
#define PIPE_BARRIER_STREAMOUT_BUFFER (1 << 10)
#define PIPE_BARRIER_GLOBAL_BUFFER (1 << 11)
+#define PIPE_BARRIER_ALL ((1 << 12) - 1)
+
+/**
+ * Flags for pipe_context::texture_barrier.
+ */
+#define PIPE_TEXTURE_BARRIER_SAMPLER (1 << 0)
+#define PIPE_TEXTURE_BARRIER_FRAMEBUFFER (1 << 1)
/**
* Resource binding flags -- state tracker must specify in advance all
#define PIPE_BIND_INDEX_BUFFER (1 << 5) /* draw_elements */
#define PIPE_BIND_CONSTANT_BUFFER (1 << 6) /* set_constant_buffer */
#define PIPE_BIND_DISPLAY_TARGET (1 << 7) /* flush_front_buffer */
-#define PIPE_BIND_TRANSFER_WRITE (1 << 8) /* transfer_map */
-#define PIPE_BIND_TRANSFER_READ (1 << 9) /* transfer_map */
+/* gap */
#define PIPE_BIND_STREAM_OUTPUT (1 << 10) /* set_stream_output_buffers */
#define PIPE_BIND_CURSOR (1 << 11) /* mouse cursor */
#define PIPE_BIND_CUSTOM (1 << 12) /* state-tracker/winsys usages */
*/
#define PIPE_RESOURCE_FLAG_MAP_PERSISTENT (1 << 0)
#define PIPE_RESOURCE_FLAG_MAP_COHERENT (1 << 1)
+#define PIPE_RESOURCE_FLAG_TEXTURING_MORE_LIKELY (1 << 2)
+#define PIPE_RESOURCE_FLAG_SPARSE (1 << 3)
#define PIPE_RESOURCE_FLAG_DRV_PRIV (1 << 16) /* driver/winsys private */
#define PIPE_RESOURCE_FLAG_ST_PRIV (1 << 24) /* state-tracker/winsys private */
PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY,
PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY,
PIPE_CAP_COMPUTE,
- PIPE_CAP_USER_INDEX_BUFFERS,
PIPE_CAP_USER_CONSTANT_BUFFERS,
PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT,
PIPE_CAP_START_INSTANCE,
PIPE_CAP_PCI_FUNCTION,
PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT,
PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR,
+ PIPE_CAP_CULL_DISTANCE,
+ PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES,
+ PIPE_CAP_TGSI_VOTE,
+ PIPE_CAP_MAX_WINDOW_RECTANGLES,
+ PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED,
+ PIPE_CAP_VIEWPORT_SUBPIXEL_BITS,
+ PIPE_CAP_MIXED_COLOR_DEPTH_BITS,
+ PIPE_CAP_TGSI_ARRAY_COMPONENTS,
+ PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS,
+ PIPE_CAP_TGSI_CAN_READ_OUTPUTS,
+ PIPE_CAP_NATIVE_FENCE_FD,
+ PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY,
+ PIPE_CAP_TGSI_FS_FBFETCH,
+ PIPE_CAP_TGSI_MUL_ZERO_WINS,
+ PIPE_CAP_DOUBLES,
+ PIPE_CAP_INT64,
+ PIPE_CAP_INT64_DIVMOD,
+ PIPE_CAP_TGSI_TEX_TXF_LZ,
+ PIPE_CAP_TGSI_CLOCK,
+ PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE,
+ PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE,
+ PIPE_CAP_TGSI_BALLOT,
+ PIPE_CAP_TGSI_TES_LAYER_VIEWPORT,
};
#define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 (1 << 0)
PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE,
PIPE_SHADER_CAP_MAX_CONST_BUFFERS,
PIPE_SHADER_CAP_MAX_TEMPS,
- PIPE_SHADER_CAP_MAX_PREDS,
/* boolean caps */
PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED,
PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR,
PIPE_SHADER_CAP_PREFERRED_IR,
PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED,
PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS,
- PIPE_SHADER_CAP_DOUBLES,
PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED, /* all rounding modes */
PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED,
PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED,
PIPE_SHADER_CAP_MAX_SHADER_BUFFERS,
PIPE_SHADER_CAP_SUPPORTED_IRS,
PIPE_SHADER_CAP_MAX_SHADER_IMAGES,
+ PIPE_SHADER_CAP_LOWER_IF_THRESHOLD,
+ PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS,
};
/**
* Shader intermediate representation.
+ *
+ * Note that if the driver requests something other than TGSI, it must
+ * always be prepared to receive TGSI in addition to its preferred IR.
+ * If the driver requests TGSI as its preferred IR, it will *always*
+ * get TGSI.
+ *
+ * Note that PIPE_SHADER_IR_TGSI should be zero for backwards compat with
+ * state trackers that only understand TGSI.
*/
enum pipe_shader_ir
{
- PIPE_SHADER_IR_TGSI,
+ PIPE_SHADER_IR_TGSI = 0,
PIPE_SHADER_IR_LLVM,
- PIPE_SHADER_IR_NATIVE
+ PIPE_SHADER_IR_NATIVE,
+ PIPE_SHADER_IR_NIR,
};
/**
*/
enum pipe_compute_cap
{
+ PIPE_COMPUTE_CAP_ADDRESS_BITS,
PIPE_COMPUTE_CAP_IR_TARGET,
PIPE_COMPUTE_CAP_GRID_DIMENSION,
PIPE_COMPUTE_CAP_MAX_GRID_SIZE,
PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY,
PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS,
PIPE_COMPUTE_CAP_IMAGES_SUPPORTED,
- PIPE_COMPUTE_CAP_SUBGROUP_SIZE
+ PIPE_COMPUTE_CAP_SUBGROUP_SIZE,
+ PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK,
};
/**
PIPE_DRIVER_QUERY_TYPE_BYTES,
PIPE_DRIVER_QUERY_TYPE_MICROSECONDS,
PIPE_DRIVER_QUERY_TYPE_HZ,
+ PIPE_DRIVER_QUERY_TYPE_DBM,
+ PIPE_DRIVER_QUERY_TYPE_TEMPERATURE,
+ PIPE_DRIVER_QUERY_TYPE_VOLTS,
+ PIPE_DRIVER_QUERY_TYPE_AMPS,
+ PIPE_DRIVER_QUERY_TYPE_WATTS,
};
/* Whether an average value per frame or a cumulative value should be
projects / mesa.git / blobdiff