#define PIPE_MAX_CLIP_PLANES 8
#define PIPE_MAX_COLOR_BUFS 8
#define PIPE_MAX_CONSTANT_BUFFERS 32
-#define PIPE_MAX_SAMPLERS 18 /* 16 public + 2 driver internal */
+#define PIPE_MAX_SAMPLERS 32
#define PIPE_MAX_SHADER_INPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */
#define PIPE_MAX_SHADER_OUTPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */
#define PIPE_MAX_SHADER_SAMPLER_VIEWS 32
#define PIPE_MAX_VIEWPORTS 16
#define PIPE_MAX_CLIP_OR_CULL_DISTANCE_COUNT 8
#define PIPE_MAX_CLIP_OR_CULL_DISTANCE_ELEMENT_COUNT 2
+#define PIPE_MAX_WINDOW_RECTANGLES 8
struct pipe_reference
*/
unsigned clip_halfz:1;
+ /**
+ * When true do not scale offset_units and use same rules for unorm and
+ * float depth buffers (D3D9). When false use GL/D3D1X behaviour.
+ * This depends on PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED.
+ */
+ unsigned offset_units_unscaled:1;
+
/**
* Enable bits for clipping half-spaces.
* This applies to both user clip planes and shader clip distances.
unsigned line_stipple_factor:8; /**< [1..256] actually */
unsigned line_stipple_pattern:16;
- uint32_t sprite_coord_enable; /* referring to 32 TEXCOORD/GENERIC inputs */
+ /**
+ * Replace the given TEXCOORD inputs with point coordinates, max. 8 inputs.
+ * If TEXCOORD (including PCOORD) are unsupported, replace GENERIC inputs
+ * instead. Max. 9 inputs: 8x GENERIC to emulate TEXCOORD, and 1x GENERIC
+ * to emulate PCOORD.
+ */
+ uint16_t sprite_coord_enable; /* 0-7: TEXCOORD/GENERIC, 8: PCOORD */
float line_width;
float point_size; /**< used when no per-vertex size */
float ucp[PIPE_MAX_CLIP_PLANES][4];
};
+/**
+ * A single output for vertex transform feedback.
+ */
+struct pipe_stream_output
+{
+ unsigned register_index:6; /**< 0 to 63 (OUT index) */
+ unsigned start_component:2; /** 0 to 3 */
+ unsigned num_components:3; /** 1 to 4 */
+ unsigned output_buffer:3; /**< 0 to PIPE_MAX_SO_BUFFERS */
+ unsigned dst_offset:16; /**< offset into the buffer in dwords */
+ unsigned stream:2; /**< 0 to 3 */
+};
/**
* Stream output for vertex transform feedback.
{
unsigned num_outputs;
/** stride for an entire vertex for each buffer in dwords */
- unsigned stride[PIPE_MAX_SO_BUFFERS];
+ uint16_t stride[PIPE_MAX_SO_BUFFERS];
/**
* Array of stream outputs, in the order they are to be written in.
* Selected components are tightly packed into the output buffer.
*/
- struct {
- unsigned register_index:8; /**< 0 to PIPE_MAX_SHADER_OUTPUTS */
- unsigned start_component:2; /** 0 to 3 */
- unsigned num_components:3; /** 1 to 4 */
- unsigned output_buffer:3; /**< 0 to PIPE_MAX_SO_BUFFERS */
- unsigned dst_offset:16; /**< offset into the buffer in dwords */
- unsigned stream:2; /**< 0 to 3 */
- } output[PIPE_MAX_SO_OUTPUTS];
+ struct pipe_stream_output output[PIPE_MAX_SO_OUTPUTS];
};
-
+/**
+ * The 'type' parameter identifies whether the shader state contains TGSI
+ * tokens, etc. If the driver returns 'PIPE_SHADER_IR_TGSI' for the
+ * 'PIPE_SHADER_CAP_PREFERRED_IR' shader param, the ir will *always* be
+ * 'PIPE_SHADER_IR_TGSI' and the tokens ptr will be valid. If the driver
+ * requests a different 'pipe_shader_ir' type, then it must check the 'type'
+ * enum to see if it is getting TGSI tokens or its preferred IR.
+ *
+ * TODO pipe_compute_state should probably get similar treatment to handle
+ * multiple IR's in a cleaner way..
+ *
+ * NOTE: since it is expected that the consumer will want to perform
+ * additional passes on the nir_shader, the driver takes ownership of
+ * the nir_shader. If state trackers need to hang on to the IR (for
+ * example, variant management), it should use nir_shader_clone().
+ */
struct pipe_shader_state
{
+ enum pipe_shader_ir type;
+ /* TODO move tokens into union. */
const struct tgsi_token *tokens;
+ union {
+ void *llvm;
+ void *native;
+ void *nir;
+ } ir;
struct pipe_stream_output_info stream_output;
};
+static inline void
+pipe_shader_state_from_tgsi(struct pipe_shader_state *state,
+ const struct tgsi_token *tokens)
+{
+ state->type = PIPE_SHADER_IR_TGSI;
+ state->tokens = tokens;
+ memset(&state->stream_output, 0, sizeof(state->stream_output));
+}
struct pipe_depth_state
{
*/
struct pipe_framebuffer_state
{
- unsigned width, height;
- unsigned samples; /**< Number of samples in a no-attachment framebuffer */
- unsigned layers; /**< Number of layers in a no-attachment framebuffer */
+ uint16_t width, height;
+ uint16_t layers; /**< Number of layers in a no-attachment framebuffer */
+ ubyte samples; /**< Number of samples in a no-attachment framebuffer */
/** multiple color buffers for multiple render targets */
- unsigned nr_cbufs;
+ ubyte nr_cbufs;
struct pipe_surface *cbufs[PIPE_MAX_COLOR_BUFS];
struct pipe_surface *zsbuf; /**< Z/stencil buffer */
unsigned wrap_s:3; /**< PIPE_TEX_WRAP_x */
unsigned wrap_t:3; /**< PIPE_TEX_WRAP_x */
unsigned wrap_r:3; /**< PIPE_TEX_WRAP_x */
- unsigned min_img_filter:2; /**< PIPE_TEX_FILTER_x */
+ unsigned min_img_filter:1; /**< PIPE_TEX_FILTER_x */
unsigned min_mip_filter:2; /**< PIPE_TEX_MIPFILTER_x */
- unsigned mag_img_filter:2; /**< PIPE_TEX_FILTER_x */
+ unsigned mag_img_filter:1; /**< PIPE_TEX_FILTER_x */
unsigned compare_mode:1; /**< PIPE_TEX_COMPARE_x */
unsigned compare_func:3; /**< PIPE_FUNC_x */
unsigned normalized_coords:1; /**< Are coords normalized to [0,1]? */
- unsigned max_anisotropy:6;
+ unsigned max_anisotropy:5;
unsigned seamless_cube_map:1;
float lod_bias; /**< LOD/lambda bias */
float min_lod, max_lod; /**< LOD clamp range, after bias */
union pipe_color_union border_color;
};
+union pipe_surface_desc {
+ struct {
+ unsigned level;
+ unsigned first_layer:16;
+ unsigned last_layer:16;
+ } tex;
+ struct {
+ unsigned first_element;
+ unsigned last_element;
+ } buf;
+};
/**
* A view into a texture that can be bound to a color render target /
struct pipe_surface
{
struct pipe_reference reference;
+ enum pipe_format format:16;
+ unsigned writable:1; /**< writable shader resource */
struct pipe_resource *texture; /**< resource into which this is a view */
struct pipe_context *context; /**< context this surface belongs to */
- enum pipe_format format;
/* XXX width/height should be removed */
- unsigned width; /**< logical width in pixels */
- unsigned height; /**< logical height in pixels */
-
- unsigned writable:1; /**< writable shader resource */
+ uint16_t width; /**< logical width in pixels */
+ uint16_t height; /**< logical height in pixels */
- union {
- struct {
- unsigned level;
- unsigned first_layer:16;
- unsigned last_layer:16;
- } tex;
- struct {
- unsigned first_element;
- unsigned last_element;
- } buf;
- } u;
+ union pipe_surface_desc u;
};
struct pipe_sampler_view
{
struct pipe_reference reference;
- enum pipe_texture_target target; /**< PIPE_TEXTURE_x */
- enum pipe_format format; /**< typed PIPE_FORMAT_x */
+ enum pipe_format format:16; /**< typed PIPE_FORMAT_x */
+ enum pipe_texture_target target:4; /**< PIPE_TEXTURE_x */
+ unsigned swizzle_r:3; /**< PIPE_SWIZZLE_x for red component */
+ unsigned swizzle_g:3; /**< PIPE_SWIZZLE_x for green component */
+ unsigned swizzle_b:3; /**< PIPE_SWIZZLE_x for blue component */
+ unsigned swizzle_a:3; /**< PIPE_SWIZZLE_x for alpha component */
struct pipe_resource *texture; /**< texture into which this is a view */
struct pipe_context *context; /**< context this view belongs to */
union {
unsigned last_level:8; /**< last mipmap level to use */
} tex;
struct {
- unsigned first_element;
- unsigned last_element;
+ unsigned offset; /**< offset in bytes */
+ unsigned size; /**< size of the readable sub-range in bytes */
} buf;
} u;
- unsigned swizzle_r:3; /**< PIPE_SWIZZLE_x for red component */
- unsigned swizzle_g:3; /**< PIPE_SWIZZLE_x for green component */
- unsigned swizzle_b:3; /**< PIPE_SWIZZLE_x for blue component */
- unsigned swizzle_a:3; /**< PIPE_SWIZZLE_x for alpha component */
};
unsigned level:8; /**< mipmap level to use */
} tex;
struct {
- unsigned first_element;
- unsigned last_element;
+ unsigned offset; /**< offset in bytes */
+ unsigned size; /**< size of the accessible sub-range in bytes */
} buf;
} u;
};
*/
struct pipe_box
{
+ /* Fields only used by textures use int16_t instead of int.
+ * x and width are used by buffers, so they need the full 32-bit range.
+ */
int x;
- int y;
- int z;
+ int16_t y;
+ int16_t z;
int width;
- int height;
- int depth;
+ int16_t height;
+ int16_t depth;
};
{
struct pipe_reference reference;
struct pipe_screen *screen; /**< screen that this texture belongs to */
- enum pipe_texture_target target; /**< PIPE_TEXTURE_x */
- enum pipe_format format; /**< PIPE_FORMAT_x */
- unsigned width0;
- unsigned height0;
- unsigned depth0;
- unsigned array_size;
+ unsigned width0; /**< Used by both buffers and textures. */
+ uint16_t height0; /* Textures: The maximum height/depth/array_size is 16k. */
+ uint16_t depth0;
+ uint16_t array_size;
+ enum pipe_format format:16; /**< PIPE_FORMAT_x */
+ enum pipe_texture_target target:8; /**< PIPE_TEXTURE_x */
unsigned last_level:8; /**< Index of last mipmap level present/defined */
unsigned nr_samples:8; /**< for multisampled surfaces, nr of samples */
unsigned usage:8; /**< PIPE_USAGE_x (not a bitmask) */
unsigned bind; /**< bitmask of PIPE_BIND_x */
unsigned flags; /**< bitmask of PIPE_RESOURCE_FLAG_x */
+
+ /**
+ * For planar images, ie. YUV EGLImage external, etc, pointer to the
+ * next plane.
+ */
+ struct pipe_resource *next;
};
};
-
/**
* A vertex buffer. Typically, all the vertex data/attributes for
* drawing something will be in one buffer. But it's also possible, for
*/
struct pipe_vertex_buffer
{
- unsigned stride; /**< stride to same attrib in next vertex, in bytes */
+ uint16_t stride; /**< stride to same attrib in next vertex, in bytes */
+ bool is_user_buffer;
unsigned buffer_offset; /**< offset to start of data in buffer, in bytes */
- struct pipe_resource *buffer; /**< the actual buffer */
- const void *user_buffer; /**< pointer to a user buffer if buffer == NULL */
+
+ union {
+ struct pipe_resource *resource; /**< the actual buffer */
+ const void *user; /**< pointer to a user buffer */
+ } buffer;
};
struct pipe_vertex_element
{
/** Offset of this attribute, in bytes, from the start of the vertex */
- unsigned src_offset;
-
- /** Instance data rate divisor. 0 means this is per-vertex data,
- * n means per-instance data used for n consecutive instances (n > 0).
- */
- unsigned instance_divisor;
+ unsigned src_offset:16;
/** Which vertex_buffer (as given to pipe->set_vertex_buffer()) does
* this attribute live in?
*/
- unsigned vertex_buffer_index;
+ unsigned vertex_buffer_index:5;
- enum pipe_format src_format;
+ enum pipe_format src_format:11;
+
+ /** Instance data rate divisor. 0 means this is per-vertex data,
+ * n means per-instance data used for n consecutive instances (n > 0).
+ */
+ unsigned instance_divisor;
};
-/**
- * An index buffer. When an index buffer is bound, all indices to vertices
- * will be looked up in the buffer.
- */
-struct pipe_index_buffer
+struct pipe_draw_indirect_info
{
- unsigned index_size; /**< size of an index, in bytes */
- unsigned offset; /**< offset to start of data in buffer, in bytes */
- struct pipe_resource *buffer; /**< the actual buffer */
- const void *user_buffer; /**< pointer to a user buffer if buffer == NULL */
+ unsigned offset; /**< must be 4 byte aligned */
+ unsigned stride; /**< must be 4 byte aligned */
+ unsigned draw_count; /**< number of indirect draws */
+ unsigned indirect_draw_count_offset; /**< must be 4 byte aligned */
+
+ /* Indirect draw parameters resource is laid out as follows:
+ *
+ * if using indexed drawing:
+ * struct {
+ * uint32_t count;
+ * uint32_t instance_count;
+ * uint32_t start;
+ * int32_t index_bias;
+ * uint32_t start_instance;
+ * };
+ * otherwise:
+ * struct {
+ * uint32_t count;
+ * uint32_t instance_count;
+ * uint32_t start;
+ * uint32_t start_instance;
+ * };
+ */
+ struct pipe_resource *buffer;
+
+ /* Indirect draw count resource: If not NULL, contains a 32-bit value which
+ * is to be used as the real draw_count.
+ */
+ struct pipe_resource *indirect_draw_count;
};
*/
struct pipe_draw_info
{
- boolean indexed; /**< use index buffer */
+ ubyte index_size; /**< if 0, the draw is not indexed. */
+ enum pipe_prim_type mode:8; /**< the mode of the primitive */
+ unsigned primitive_restart:1;
+ unsigned has_user_indices:1; /**< if true, use index.user_buffer */
+ ubyte vertices_per_patch; /**< the number of vertices per patch */
- unsigned mode; /**< the mode of the primitive */
- unsigned start; /**< the index of the first vertex */
+ /**
+ * Direct draws: start is the index of the first vertex
+ * Non-indexed indirect draws: not used
+ * Indexed indirect draws: start is added to the indirect start.
+ */
+ unsigned start;
unsigned count; /**< number of vertices */
unsigned start_instance; /**< first instance id */
unsigned drawid; /**< id of this draw in a multidraw */
- unsigned vertices_per_patch; /**< the number of vertices per patch */
-
/**
* For indexed drawing, these fields apply after index lookup.
*/
/**
* Primitive restart enable/index (only applies to indexed drawing)
*/
- boolean primitive_restart;
unsigned restart_index;
+ /* Pointers must be at the end for an optimal structure layout on 64-bit. */
+
+ /**
+ * An index buffer. When an index buffer is bound, all indices to vertices
+ * will be looked up from the buffer.
+ *
+ * If has_user_indices, use index.user, else use index.resource.
+ */
+ union {
+ struct pipe_resource *resource; /**< real buffer */
+ const void *user; /**< pointer to a user buffer */
+ } index;
+
+ struct pipe_draw_indirect_info *indirect; /**< Indirect draw. */
+
/**
* Stream output target. If not NULL, it's used to provide the 'count'
* parameter based on the number vertices captured by the stream output
* be set via set_vertex_buffers manually.
*/
struct pipe_stream_output_target *count_from_stream_output;
-
- /* Indirect draw parameters resource: If not NULL, most values are taken
- * from this buffer instead, which is laid out as follows:
- *
- * if indexed is TRUE:
- * struct {
- * uint32_t count;
- * uint32_t instance_count;
- * uint32_t start;
- * int32_t index_bias;
- * uint32_t start_instance;
- * };
- * otherwise:
- * struct {
- * uint32_t count;
- * uint32_t instance_count;
- * uint32_t start;
- * uint32_t start_instance;
- * };
- */
- struct pipe_resource *indirect;
- unsigned indirect_offset; /**< must be 4 byte aligned */
- unsigned indirect_stride; /**< must be 4 byte aligned */
- unsigned indirect_count; /**< number of indirect draws */
-
- /* Indirect draw count resource: If not NULL, contains a 32-bit value which
- * is to be used as the real indirect_count. In that case indirect_count
- * becomes the maximum possible value.
- */
- struct pipe_resource *indirect_params;
- unsigned indirect_params_offset; /**< must be 4 byte aligned */
};
boolean scissor_enable;
struct pipe_scissor_state scissor;
+ /* Window rectangles can either be inclusive or exclusive. */
+ boolean window_rectangle_include;
+ unsigned num_window_rectangles;
+ struct pipe_scissor_state window_rectangles[PIPE_MAX_WINDOW_RECTANGLES];
+
boolean render_condition_enable; /**< whether the blit should honor the
current render condition */
boolean alpha_blend; /* dst.rgb = src.rgb * src.a + dst.rgb * (1 - src.a) */
*/
void *input;
+ /**
+ * Grid number of dimensions, 1-3, e.g. the work_dim parameter passed to
+ * clEnqueueNDRangeKernel. Note block[] and grid[] must be padded with
+ * 1 for non-used dimensions.
+ */
+ uint work_dim;
+
/**
* Determine the layout of the working block (in thread units) to be used.
*/
*/
struct pipe_debug_callback
{
+ /**
+ * When set to \c true, the callback may be called asynchronously from a
+ * driver-created thread.
+ */
+ bool async;
+
/**
* Callback for the driver to report debug/performance/etc information back
* to the state tracker.
void *data;
};
+/**
+ * Structure that contains a callback for device reset messages from the driver
+ * back to the state tracker.
+ *
+ * The callback must not be called from driver-created threads.
+ */
+struct pipe_device_reset_callback
+{
+ /**
+ * Callback for the driver to report when a device reset is detected.
+ *
+ * \param data user-supplied data pointer
+ * \param status PIPE_*_RESET
+ */
+ void (*reset)(void *data, enum pipe_reset_status status);
+
+ void *data;
+};
+
/**
* Information about memory usage. All sizes are in kilobytes.
*/