* Basic notes:
* 1. Want compact representations, so we use bitfields.
* 2. Put bitfields before other (GLfloat) fields.
+ * 3. enum bitfields need to be at least one bit extra in size so the most
+ * significant bit is zero. MSVC treats enums as signed so if the high
+ * bit is set, the value will be interpreted as a negative number.
+ * That causes trouble in various places.
*/
#define PIPE_MAX_SAMPLERS 32
#define PIPE_MAX_SHADER_INPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */
#define PIPE_MAX_SHADER_OUTPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */
-#define PIPE_MAX_SHADER_SAMPLER_VIEWS 32
+#define PIPE_MAX_SHADER_SAMPLER_VIEWS 128
#define PIPE_MAX_SHADER_BUFFERS 32
#define PIPE_MAX_SHADER_IMAGES 32
#define PIPE_MAX_TEXTURE_LEVELS 16
#define PIPE_MAX_CLIP_OR_CULL_DISTANCE_COUNT 8
#define PIPE_MAX_CLIP_OR_CULL_DISTANCE_ELEMENT_COUNT 2
#define PIPE_MAX_WINDOW_RECTANGLES 8
+#define PIPE_MAX_SAMPLE_LOCATION_GRID_SIZE 4
+#define PIPE_MAX_HW_ATOMIC_BUFFERS 32
struct pipe_reference
{
unsigned line_smooth:1;
unsigned line_stipple_enable:1;
unsigned line_last_pixel:1;
+ unsigned conservative_raster_mode:2; /**< PIPE_CONSERVATIVE_RASTER_x */
/**
* Use the first vertex of a primitive as the provoking vertex for
unsigned half_pixel_center:1;
unsigned bottom_edge_rule:1;
+ /*
+ * Conservative rasterization subpixel precision bias in bits
+ */
+ unsigned subpixel_precision_x:4;
+ unsigned subpixel_precision_y:4;
+
/**
* When true, rasterization is disabled and no pixels are written.
* This only makes sense with the Stream Out functionality.
*/
unsigned rasterizer_discard:1;
+ /**
+ * Exposed by PIPE_CAP_TILE_RASTER_ORDER. When true,
+ * tile_raster_order_increasing_* indicate the order that the rasterizer
+ * should render tiles, to meet the requirements of
+ * GL_MESA_tile_raster_order.
+ */
+ unsigned tile_raster_order_fixed:1;
+ unsigned tile_raster_order_increasing_x:1;
+ unsigned tile_raster_order_increasing_y:1;
+
/**
* When false, depth clipping is disabled and the depth value will be
* clamped later at the per-pixel level before depth testing.
* This depends on PIPE_CAP_DEPTH_CLIP_DISABLE.
+ *
+ * If PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE is unsupported, depth_clip_near
+ * is equal to depth_clip_far.
*/
- unsigned depth_clip:1;
+ unsigned depth_clip_near:1;
+ unsigned depth_clip_far:1;
/**
* When true clip space in the z axis goes from [0..1] (D3D). When false
unsigned line_stipple_factor:8; /**< [1..256] actually */
unsigned line_stipple_pattern:16;
- uint32_t sprite_coord_enable; /* referring to 32 TEXCOORD/GENERIC inputs */
+ /**
+ * Replace the given TEXCOORD inputs with point coordinates, max. 8 inputs.
+ * If TEXCOORD (including PCOORD) are unsupported, replace GENERIC inputs
+ * instead. Max. 9 inputs: 8x GENERIC to emulate TEXCOORD, and 1x GENERIC
+ * to emulate PCOORD.
+ */
+ uint16_t sprite_coord_enable; /* 0-7: TEXCOORD/GENERIC, 8: PCOORD */
float line_width;
float point_size; /**< used when no per-vertex size */
float offset_units;
float offset_scale;
float offset_clamp;
+ float conservative_raster_dilate;
};
*/
struct pipe_stream_output
{
- unsigned register_index:8; /**< 0 to PIPE_MAX_SHADER_OUTPUTS */
+ unsigned register_index:6; /**< 0 to 63 (OUT index) */
unsigned start_component:2; /** 0 to 3 */
unsigned num_components:3; /** 1 to 4 */
unsigned output_buffer:3; /**< 0 to PIPE_MAX_SO_BUFFERS */
{
unsigned num_outputs;
/** stride for an entire vertex for each buffer in dwords */
- unsigned stride[PIPE_MAX_SO_BUFFERS];
+ uint16_t stride[PIPE_MAX_SO_BUFFERS];
/**
* Array of stream outputs, in the order they are to be written in.
/* TODO move tokens into union. */
const struct tgsi_token *tokens;
union {
- void *llvm;
void *native;
void *nir;
} ir;
*/
struct pipe_framebuffer_state
{
- unsigned width, height;
- unsigned samples; /**< Number of samples in a no-attachment framebuffer */
- unsigned layers; /**< Number of layers in a no-attachment framebuffer */
+ uint16_t width, height;
+ uint16_t layers; /**< Number of layers in a no-attachment framebuffer */
+ ubyte samples; /**< Number of samples in a no-attachment framebuffer */
/** multiple color buffers for multiple render targets */
- unsigned nr_cbufs;
+ ubyte nr_cbufs;
struct pipe_surface *cbufs[PIPE_MAX_COLOR_BUFS];
struct pipe_surface *zsbuf; /**< Z/stencil buffer */
struct pipe_surface
{
struct pipe_reference reference;
+ enum pipe_format format:16;
+ unsigned writable:1; /**< writable shader resource */
struct pipe_resource *texture; /**< resource into which this is a view */
struct pipe_context *context; /**< context this surface belongs to */
- enum pipe_format format;
/* XXX width/height should be removed */
- unsigned width; /**< logical width in pixels */
- unsigned height; /**< logical height in pixels */
+ uint16_t width; /**< logical width in pixels */
+ uint16_t height; /**< logical height in pixels */
- unsigned writable:1; /**< writable shader resource */
+ /**
+ * Number of samples for the surface. This will be 0 if rendering
+ * should use the resource's nr_samples, or another value if the resource
+ * is bound using FramebufferTexture2DMultisampleEXT.
+ */
+ unsigned nr_samples:8;
union pipe_surface_desc u;
};
struct pipe_sampler_view
{
struct pipe_reference reference;
- enum pipe_texture_target target; /**< PIPE_TEXTURE_x */
- enum pipe_format format; /**< typed PIPE_FORMAT_x */
+ enum pipe_format format:15; /**< typed PIPE_FORMAT_x */
+ enum pipe_texture_target target:5; /**< PIPE_TEXTURE_x */
+ unsigned swizzle_r:3; /**< PIPE_SWIZZLE_x for red component */
+ unsigned swizzle_g:3; /**< PIPE_SWIZZLE_x for green component */
+ unsigned swizzle_b:3; /**< PIPE_SWIZZLE_x for blue component */
+ unsigned swizzle_a:3; /**< PIPE_SWIZZLE_x for alpha component */
struct pipe_resource *texture; /**< texture into which this is a view */
struct pipe_context *context; /**< context this view belongs to */
union {
unsigned size; /**< size of the readable sub-range in bytes */
} buf;
} u;
- unsigned swizzle_r:3; /**< PIPE_SWIZZLE_x for red component */
- unsigned swizzle_g:3; /**< PIPE_SWIZZLE_x for green component */
- unsigned swizzle_b:3; /**< PIPE_SWIZZLE_x for blue component */
- unsigned swizzle_a:3; /**< PIPE_SWIZZLE_x for alpha component */
};
{
struct pipe_resource *resource; /**< resource into which this is a view */
enum pipe_format format; /**< typed PIPE_FORMAT_x */
- unsigned access; /**< PIPE_IMAGE_ACCESS_x */
+ uint16_t access; /**< PIPE_IMAGE_ACCESS_x */
+ uint16_t shader_access; /**< PIPE_IMAGE_ACCESS_x */
union {
struct {
*/
struct pipe_box
{
+ /* Fields only used by textures use int16_t instead of int.
+ * x and width are used by buffers, so they need the full 32-bit range.
+ */
int x;
- int y;
- int z;
+ int16_t y;
+ int16_t z;
int width;
- int height;
- int depth;
+ int16_t height;
+ int16_t depth;
};
struct pipe_resource
{
struct pipe_reference reference;
- struct pipe_screen *screen; /**< screen that this texture belongs to */
- enum pipe_texture_target target; /**< PIPE_TEXTURE_x */
- enum pipe_format format; /**< PIPE_FORMAT_x */
- unsigned width0;
- unsigned height0;
- unsigned depth0;
- unsigned array_size;
+ unsigned width0; /**< Used by both buffers and textures. */
+ uint16_t height0; /* Textures: The maximum height/depth/array_size is 16k. */
+ uint16_t depth0;
+ uint16_t array_size;
+ enum pipe_format format:16; /**< PIPE_FORMAT_x */
+ enum pipe_texture_target target:8; /**< PIPE_TEXTURE_x */
unsigned last_level:8; /**< Index of last mipmap level present/defined */
- unsigned nr_samples:8; /**< for multisampled surfaces, nr of samples */
- unsigned usage:8; /**< PIPE_USAGE_x (not a bitmask) */
+ /** Number of samples determining quality, driving rasterizer, shading,
+ * and framebuffer.
+ */
+ unsigned nr_samples:8;
+
+ /** Multiple samples within a pixel can have the same value.
+ * nr_storage_samples determines how many slots for different values
+ * there are per pixel. Only color buffers can set this lower than
+ * nr_samples.
+ */
+ unsigned nr_storage_samples:8;
+
+ unsigned usage:8; /**< PIPE_USAGE_x (not a bitmask) */
unsigned bind; /**< bitmask of PIPE_BIND_x */
unsigned flags; /**< bitmask of PIPE_RESOURCE_FLAG_x */
* next plane.
*/
struct pipe_resource *next;
+ /* The screen pointer should be last for optimal structure packing. */
+ struct pipe_screen *screen; /**< screen that this texture belongs to */
};
};
-
/**
* A vertex buffer. Typically, all the vertex data/attributes for
* drawing something will be in one buffer. But it's also possible, for
*/
struct pipe_vertex_buffer
{
- unsigned stride; /**< stride to same attrib in next vertex, in bytes */
+ uint16_t stride; /**< stride to same attrib in next vertex, in bytes */
+ bool is_user_buffer;
unsigned buffer_offset; /**< offset to start of data in buffer, in bytes */
- struct pipe_resource *buffer; /**< the actual buffer */
- const void *user_buffer; /**< pointer to a user buffer if buffer == NULL */
+
+ union {
+ struct pipe_resource *resource; /**< the actual buffer */
+ const void *user; /**< pointer to a user buffer */
+ } buffer;
};
struct pipe_vertex_element
{
/** Offset of this attribute, in bytes, from the start of the vertex */
- unsigned src_offset;
-
- /** Instance data rate divisor. 0 means this is per-vertex data,
- * n means per-instance data used for n consecutive instances (n > 0).
- */
- unsigned instance_divisor;
+ unsigned src_offset:16;
/** Which vertex_buffer (as given to pipe->set_vertex_buffer()) does
* this attribute live in?
*/
- unsigned vertex_buffer_index;
+ unsigned vertex_buffer_index:5;
+
+ enum pipe_format src_format:11;
- enum pipe_format src_format;
+ /** Instance data rate divisor. 0 means this is per-vertex data,
+ * n means per-instance data used for n consecutive instances (n > 0).
+ */
+ unsigned instance_divisor;
};
-/**
- * An index buffer. When an index buffer is bound, all indices to vertices
- * will be looked up in the buffer.
- */
-struct pipe_index_buffer
+struct pipe_draw_indirect_info
{
- unsigned index_size; /**< size of an index, in bytes */
- unsigned offset; /**< offset to start of data in buffer, in bytes */
- struct pipe_resource *buffer; /**< the actual buffer */
- const void *user_buffer; /**< pointer to a user buffer if buffer == NULL */
+ unsigned offset; /**< must be 4 byte aligned */
+ unsigned stride; /**< must be 4 byte aligned */
+ unsigned draw_count; /**< number of indirect draws */
+ unsigned indirect_draw_count_offset; /**< must be 4 byte aligned */
+
+ /* Indirect draw parameters resource is laid out as follows:
+ *
+ * if using indexed drawing:
+ * struct {
+ * uint32_t count;
+ * uint32_t instance_count;
+ * uint32_t start;
+ * int32_t index_bias;
+ * uint32_t start_instance;
+ * };
+ * otherwise:
+ * struct {
+ * uint32_t count;
+ * uint32_t instance_count;
+ * uint32_t start;
+ * uint32_t start_instance;
+ * };
+ */
+ struct pipe_resource *buffer;
+
+ /* Indirect draw count resource: If not NULL, contains a 32-bit value which
+ * is to be used as the real draw_count.
+ */
+ struct pipe_resource *indirect_draw_count;
};
*/
struct pipe_draw_info
{
- boolean indexed; /**< use index buffer */
- enum pipe_prim_type mode; /**< the mode of the primitive */
- boolean primitive_restart;
+ ubyte index_size; /**< if 0, the draw is not indexed. */
+ enum pipe_prim_type mode:8; /**< the mode of the primitive */
+ unsigned primitive_restart:1;
+ unsigned has_user_indices:1; /**< if true, use index.user_buffer */
ubyte vertices_per_patch; /**< the number of vertices per patch */
- unsigned start; /**< the index of the first vertex */
+ /**
+ * Direct draws: start is the index of the first vertex
+ * Non-indexed indirect draws: not used
+ * Indexed indirect draws: start is added to the indirect start.
+ */
+ unsigned start;
unsigned count; /**< number of vertices */
unsigned start_instance; /**< first instance id */
*/
unsigned restart_index;
- unsigned indirect_offset; /**< must be 4 byte aligned */
- unsigned indirect_stride; /**< must be 4 byte aligned */
- unsigned indirect_count; /**< number of indirect draws */
-
- unsigned indirect_params_offset; /**< must be 4 byte aligned */
-
/* Pointers must be at the end for an optimal structure layout on 64-bit. */
- /* Indirect draw parameters resource: If not NULL, most values are taken
- * from this buffer instead, which is laid out as follows:
+ /**
+ * An index buffer. When an index buffer is bound, all indices to vertices
+ * will be looked up from the buffer.
*
- * if indexed is TRUE:
- * struct {
- * uint32_t count;
- * uint32_t instance_count;
- * uint32_t start;
- * int32_t index_bias;
- * uint32_t start_instance;
- * };
- * otherwise:
- * struct {
- * uint32_t count;
- * uint32_t instance_count;
- * uint32_t start;
- * uint32_t start_instance;
- * };
+ * If has_user_indices, use index.user, else use index.resource.
*/
- struct pipe_resource *indirect;
+ union {
+ struct pipe_resource *resource; /**< real buffer */
+ const void *user; /**< pointer to a user buffer */
+ } index;
- /* Indirect draw count resource: If not NULL, contains a 32-bit value which
- * is to be used as the real indirect_count. In that case indirect_count
- * becomes the maximum possible value.
- */
- struct pipe_resource *indirect_params;
+ struct pipe_draw_indirect_info *indirect; /**< Indirect draw. */
/**
* Stream output target. If not NULL, it's used to provide the 'count'
struct pipe_grid_info
{
/**
- * For drivers that use PIPE_SHADER_IR_LLVM as their prefered IR, this value
- * will be the index of the kernel in the opencl.kernels metadata list.
+ * For drivers that use PIPE_SHADER_IR_NATIVE as their prefered IR, this
+ * value will be the index of the kernel in the opencl.kernels metadata
+ * list.
*/
uint32_t pc;
unsigned nr_device_memory_evictions; /**< # of evictions (monotonic counter) */
};
+/**
+ * Structure that contains information about external memory
+ */
+struct pipe_memory_object
+{
+ bool dedicated;
+};
+
#ifdef __cplusplus
}
#endif
projects / mesa.git / blobdiff