* of the Software.
*/
-/* Contact:
- * Marek Olšák <maraeo@gmail.com>
- */
-
#include "amdgpu_winsys.h"
#include "util/u_format.h"
enum radeon_surf_mode mode,
struct radeon_surf *surf)
{
- struct amdgpu_winsys *ws = (struct amdgpu_winsys*)rws;
+ struct amdgpu_winsys *ws = amdgpu_winsys(rws);
int r;
r = amdgpu_surface_sanity(tex);
config.info.depth = tex->depth0;
config.info.array_size = tex->array_size;
config.info.samples = tex->nr_samples;
+ config.info.storage_samples = tex->nr_storage_samples;
config.info.levels = tex->last_level + 1;
+ config.info.num_channels = util_format_get_nr_components(tex->format);
config.is_3d = !!(tex->target == PIPE_TEXTURE_3D);
config.is_cube = !!(tex->target == PIPE_TEXTURE_CUBE);
- config.chip_class = ws->info.chip_class;
- config.num_tile_pipes = ws->info.num_tile_pipes;
- config.pipe_interleave_bytes = ws->info.pipe_interleave_bytes;
- config.amdinfo = &ws->amdinfo;
- return ac_compute_surface(ws->addrlib, &config, mode, surf);
+ /* Use different surface counters for color and FMASK, so that MSAA MRTs
+ * always use consecutive surface indices when FMASK is allocated between
+ * them.
+ */
+ config.info.surf_index = &ws->surf_index_color;
+ config.info.fmask_surf_index = &ws->surf_index_fmask;
+
+ if (flags & RADEON_SURF_Z_OR_SBUFFER)
+ config.info.surf_index = NULL;
+
+ return ac_compute_surface(ws->addrlib, &ws->info, &config, mode, surf);
}
void amdgpu_surface_init_functions(struct amdgpu_winsys *ws)