* Corbin Simpson <MostAwesomeDude@gmail.com>
* Joakim Sindholt <opensource@zhasha.com>
*/
-#include <stdio.h>
-#include <errno.h>
-#include <sys/ioctl.h>
-#include "util/u_inlines.h"
-#include "util/u_debug.h"
-#include <pipebuffer/pb_bufmgr.h>
-#include "r600.h"
+
#include "r600_priv.h"
#include "r600_drm_public.h"
-#include "xf86drm.h"
-#include "radeon_drm.h"
+#include "util/u_memory.h"
+#include <errno.h>
+
+#ifndef RADEON_INFO_NUM_TILE_PIPES
+#define RADEON_INFO_NUM_TILE_PIPES 0xb
+#endif
-#ifndef RADEON_INFO_TILING_CONFIG
-#define RADEON_INFO_TILING_CONFIG 0x6
+#ifndef RADEON_INFO_BACKEND_MAP
+#define RADEON_INFO_BACKEND_MAP 0xd
#endif
-static int radeon_get_device(struct radeon *radeon)
+
+enum radeon_family r600_get_family(struct radeon *r600)
{
- struct drm_radeon_info info;
- int r;
-
- radeon->device = 0;
- info.request = RADEON_INFO_DEVICE_ID;
- info.value = (uintptr_t)&radeon->device;
- r = drmCommandWriteRead(radeon->fd, DRM_RADEON_INFO, &info,
- sizeof(struct drm_radeon_info));
- return r;
+ return r600->family;
}
-static int radeon_drm_get_tiling(struct radeon *radeon)
+enum chip_class r600_get_family_class(struct radeon *radeon)
+{
+ return radeon->chip_class;
+}
+
+struct r600_tiling_info *r600_get_tiling_info(struct radeon *radeon)
+{
+ return &radeon->tiling_info;
+}
+
+unsigned r600_get_clock_crystal_freq(struct radeon *radeon)
+{
+ return radeon->info.r600_clock_crystal_freq;
+}
+
+unsigned r600_get_num_backends(struct radeon *radeon)
{
- struct drm_radeon_info info;
- int r;
- uint32_t tiling_config;
+ return radeon->info.r600_num_backends;
+}
- info.request = RADEON_INFO_TILING_CONFIG;
- info.value = (uintptr_t)&tiling_config;
- r = drmCommandWriteRead(radeon->fd, DRM_RADEON_INFO, &info,
- sizeof(struct drm_radeon_info));
+unsigned r600_get_num_tile_pipes(struct radeon *radeon)
+{
+ return radeon->info.r600_num_tile_pipes;
+}
- if (r)
- return r;
+unsigned r600_get_backend_map(struct radeon *radeon)
+{
+ return radeon->info.r600_backend_map;
+}
+unsigned r600_get_minor_version(struct radeon *radeon)
+{
+ return radeon->info.drm_minor;
+}
+
+static int r600_interpret_tiling(struct radeon *radeon, uint32_t tiling_config)
+{
switch ((tiling_config & 0xe) >> 1) {
case 0:
radeon->tiling_info.num_channels = 1;
return 0;
}
-struct radeon *radeon_new(int fd, unsigned device)
+static int eg_interpret_tiling(struct radeon *radeon, uint32_t tiling_config)
{
- struct radeon *radeon;
- int r;
-
- radeon = calloc(1, sizeof(*radeon));
- if (radeon == NULL) {
- return NULL;
- }
- radeon->fd = fd;
- radeon->device = device;
- radeon->refcount = 1;
- if (fd >= 0) {
- r = radeon_get_device(radeon);
- if (r) {
- fprintf(stderr, "Failed to get device id\n");
- return radeon_decref(radeon);
- }
- }
- radeon->family = radeon_family_from_device(radeon->device);
- if (radeon->family == CHIP_UNKNOWN) {
- fprintf(stderr, "Unknown chipset 0x%04X\n", radeon->device);
- return radeon_decref(radeon);
+ switch (tiling_config & 0xf) {
+ case 0:
+ radeon->tiling_info.num_channels = 1;
+ break;
+ case 1:
+ radeon->tiling_info.num_channels = 2;
+ break;
+ case 2:
+ radeon->tiling_info.num_channels = 4;
+ break;
+ case 3:
+ radeon->tiling_info.num_channels = 8;
+ break;
+ default:
+ return -EINVAL;
}
- switch (radeon->family) {
- case CHIP_R600:
- case CHIP_RV610:
- case CHIP_RV630:
- case CHIP_RV670:
- case CHIP_RV620:
- case CHIP_RV635:
- case CHIP_RS780:
- case CHIP_RS880:
- case CHIP_RV770:
- case CHIP_RV730:
- case CHIP_RV710:
- case CHIP_RV740:
- case CHIP_CEDAR:
- case CHIP_REDWOOD:
- case CHIP_JUNIPER:
- case CHIP_CYPRESS:
- case CHIP_HEMLOCK:
+
+ switch ((tiling_config & 0xf0) >> 4) {
+ case 0:
+ radeon->tiling_info.num_banks = 4;
+ break;
+ case 1:
+ radeon->tiling_info.num_banks = 8;
+ break;
+ case 2:
+ radeon->tiling_info.num_banks = 16;
break;
- case CHIP_R100:
- case CHIP_RV100:
- case CHIP_RS100:
- case CHIP_RV200:
- case CHIP_RS200:
- case CHIP_R200:
- case CHIP_RV250:
- case CHIP_RS300:
- case CHIP_RV280:
- case CHIP_R300:
- case CHIP_R350:
- case CHIP_RV350:
- case CHIP_RV380:
- case CHIP_R420:
- case CHIP_R423:
- case CHIP_RV410:
- case CHIP_RS400:
- case CHIP_RS480:
- case CHIP_RS600:
- case CHIP_RS690:
- case CHIP_RS740:
- case CHIP_RV515:
- case CHIP_R520:
- case CHIP_RV530:
- case CHIP_RV560:
- case CHIP_RV570:
- case CHIP_R580:
default:
- fprintf(stderr, "%s unknown or unsupported chipset 0x%04X\n",
- __func__, radeon->device);
+ return -EINVAL;
+
+ }
+
+ switch ((tiling_config & 0xf00) >> 8) {
+ case 0:
+ radeon->tiling_info.group_bytes = 256;
break;
+ case 1:
+ radeon->tiling_info.group_bytes = 512;
+ break;
+ default:
+ return -EINVAL;
}
+ return 0;
+}
+
+static int radeon_drm_get_tiling(struct radeon *radeon)
+{
+ uint32_t tiling_config = radeon->info.r600_tiling_config;
+
+ if (!tiling_config)
+ return 0;
+ if (radeon->chip_class == R600 || radeon->chip_class == R700) {
+ return r600_interpret_tiling(radeon, tiling_config);
+ } else {
+ return eg_interpret_tiling(radeon, tiling_config);
+ }
+}
+
+struct radeon *radeon_create(struct radeon_winsys *ws)
+{
+ struct radeon *radeon = CALLOC_STRUCT(radeon);
+ if (radeon == NULL) {
+ return NULL;
+ }
+
+ radeon->ws = ws;
+ ws->query_info(ws, &radeon->info);
+
+ radeon->family = radeon_family_from_device(radeon->info.pci_id);
+ if (radeon->family == CHIP_UNKNOWN) {
+ fprintf(stderr, "Unknown chipset 0x%04X\n", radeon->info.pci_id);
+ return radeon_destroy(radeon);
+ }
/* setup class */
switch (radeon->family) {
case CHIP_R600:
case CHIP_RS780:
case CHIP_RS880:
radeon->chip_class = R600;
+ /* set default group bytes, overridden by tiling info ioctl */
+ radeon->tiling_info.group_bytes = 256;
break;
case CHIP_RV770:
case CHIP_RV730:
case CHIP_RV710:
case CHIP_RV740:
radeon->chip_class = R700;
+ /* set default group bytes, overridden by tiling info ioctl */
+ radeon->tiling_info.group_bytes = 256;
break;
case CHIP_CEDAR:
case CHIP_REDWOOD:
case CHIP_JUNIPER:
case CHIP_CYPRESS:
case CHIP_HEMLOCK:
+ case CHIP_PALM:
+ case CHIP_SUMO:
+ case CHIP_SUMO2:
+ case CHIP_BARTS:
+ case CHIP_TURKS:
+ case CHIP_CAICOS:
radeon->chip_class = EVERGREEN;
+ /* set default group bytes, overridden by tiling info ioctl */
+ radeon->tiling_info.group_bytes = 512;
+ break;
+ case CHIP_CAYMAN:
+ radeon->chip_class = CAYMAN;
+ /* set default group bytes, overridden by tiling info ioctl */
+ radeon->tiling_info.group_bytes = 512;
break;
default:
fprintf(stderr, "%s unknown or unsupported chipset 0x%04X\n",
- __func__, radeon->device);
+ __func__, radeon->info.pci_id);
break;
}
- if (radeon->chip_class == R600 || radeon->chip_class == R700) {
- if (radeon_drm_get_tiling(radeon))
- return NULL;
- }
- radeon->kman = radeon_bo_pbmgr_create(radeon);
- if (!radeon->kman)
+ if (radeon_drm_get_tiling(radeon))
return NULL;
- radeon->cman = pb_cache_manager_create(radeon->kman, 100000);
- if (!radeon->cman)
- return NULL;
- return radeon;
-}
-struct radeon *r600_drm_winsys_create(int drmfd)
-{
- return radeon_new(drmfd, 0);
+ return radeon;
}
-struct radeon *radeon_decref(struct radeon *radeon)
+struct radeon *radeon_destroy(struct radeon *radeon)
{
if (radeon == NULL)
return NULL;
- if (--radeon->refcount > 0) {
- return NULL;
- }
-
- if (radeon->cman)
- radeon->cman->destroy(radeon->cman);
-
- if (radeon->kman)
- radeon->kman->destroy(radeon->kman);
-
- if (radeon->fd >= 0)
- drmClose(radeon->fd);
- free(radeon);
+ FREE(radeon);
return NULL;
}
projects / mesa.git / blobdiff