r600g: evergreen CBs are more sane to support with a single state

[mesa.git] / src / gallium / winsys / r600 / drm / r600_state.c

diff --git a/src/gallium/winsys/r600/drm/r600_state.c b/src/gallium/winsys/r600/drm/r600_state.c
index d6f996a49099aaae32d755a149252fa10d9c6bc3..4a0111b6c5f4f4bed385e196230afdfc211a983d 100644 (file)
--- a/src/gallium/winsys/r600/drm/r600_state.c
+++ b/src/gallium/winsys/r600/drm/r600_state.c
@@ -111,14 +111,7 @@ struct radeon_stype_info eg_stypes[] = {
        { R600_STATE_RESOURCE, 176, 0x20, r600_state_pm4_resource, { EG_SUB_PS(PS_RESOURCE), EG_SUB_VS(VS_RESOURCE), EG_SUB_GS(GS_RESOURCE), EG_SUB_FS(FS_RESOURCE)} },
        { R600_STATE_SAMPLER, 18, 0xc, r600_state_pm4_generic, { EG_SUB_PS(PS_SAMPLER), EG_SUB_VS(VS_SAMPLER), EG_SUB_GS(GS_SAMPLER) } },
        { R600_STATE_SAMPLER_BORDER, 18, 0x10, r600_state_pm4_generic, { EG_SUB_PS(PS_SAMPLER_BORDER), EG_SUB_VS(VS_SAMPLER_BORDER), EG_SUB_GS(GS_SAMPLER_BORDER) } },
-       { R600_STATE_CB0, 1, 0, r600_state_pm4_generic, EG_SUB_NONE(CB0) },
-       { R600_STATE_CB1, 1, 0, r600_state_pm4_generic, EG_SUB_NONE(CB1) },
-       { R600_STATE_CB2, 1, 0, r600_state_pm4_generic, EG_SUB_NONE(CB2) },
-       { R600_STATE_CB3, 1, 0, r600_state_pm4_generic, EG_SUB_NONE(CB3) },
-       { R600_STATE_CB4, 1, 0, r600_state_pm4_generic, EG_SUB_NONE(CB4) },
-       { R600_STATE_CB5, 1, 0, r600_state_pm4_generic, EG_SUB_NONE(CB5) },
-       { R600_STATE_CB6, 1, 0, r600_state_pm4_generic, EG_SUB_NONE(CB6) },
-       { R600_STATE_CB7, 1, 0, r600_state_pm4_generic, EG_SUB_NONE(CB7) },
+       { R600_STATE_CB0, 11, 0x3c, r600_state_pm4_generic, EG_SUB_NONE(CB) },
        { R600_STATE_QUERY_BEGIN, 1, 0, r600_state_pm4_query_begin, EG_SUB_NONE(VGT_EVENT) },
        { R600_STATE_QUERY_END, 1, 0, r600_state_pm4_query_end, EG_SUB_NONE(VGT_EVENT) },
        { R600_STATE_DB, 1, 0, r600_state_pm4_generic, EG_SUB_NONE(DB) },