r600g: bring over fix from old path to new path

[mesa.git] / src / gallium / winsys / r600 / drm / r600_state2.c

diff --git a/src/gallium/winsys/r600/drm/r600_state2.c b/src/gallium/winsys/r600/drm/r600_state2.c
index edd1d13a7bb3f88b7ed27cdbdd1db49579cb8ed7..e1f32da91b04b3ff163d34c59f2efeda1d036eb1 100644 (file)
--- a/src/gallium/winsys/r600/drm/r600_state2.c
+++ b/src/gallium/winsys/r600/drm/r600_state2.c
@@ -68,7 +68,7 @@ static void r600_context_queries_resume(struct r600_context *ctx);
 static int r600_group_id_register_offset(struct r600_context *ctx, unsigned offset)
 {
        for (int i = 0; i < ctx->ngroups; i++) {
-               if (offset >= ctx->groups[i].start_offset && offset <= ctx->groups[i].end_offset) {
+               if (offset >= ctx->groups[i].start_offset && offset < ctx->groups[i].end_offset) {
                        return i;
                }
        }
@@ -211,57 +211,85 @@ static const struct r600_reg r600_reg_list[] = {
        {0, 0, R_028B20_VGT_STRMOUT_BUFFER_EN},
        {0, 0, R_028028_DB_STENCIL_CLEAR},
        {0, 0, R_02802C_DB_DEPTH_CLEAR},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_028040_CB_COLOR0_BASE},
-       {0, 0, R_0280A0_CB_COLOR0_INFO},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
+       {1, 0, R_0280A0_CB_COLOR0_INFO},
        {0, 0, R_028060_CB_COLOR0_SIZE},
        {0, 0, R_028080_CB_COLOR0_VIEW},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_0280E0_CB_COLOR0_FRAG},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_0280C0_CB_COLOR0_TILE},
        {0, 0, R_028100_CB_COLOR0_MASK},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_028044_CB_COLOR1_BASE},
-       {0, 0, R_0280A4_CB_COLOR1_INFO},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
+       {1, 0, R_0280A4_CB_COLOR1_INFO},
        {0, 0, R_028064_CB_COLOR1_SIZE},
        {0, 0, R_028084_CB_COLOR1_VIEW},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_0280E4_CB_COLOR1_FRAG},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_0280C4_CB_COLOR1_TILE},
        {0, 0, R_028104_CB_COLOR1_MASK},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_028048_CB_COLOR2_BASE},
-       {0, 0, R_0280A8_CB_COLOR2_INFO},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
+       {1, 0, R_0280A8_CB_COLOR2_INFO},
        {0, 0, R_028068_CB_COLOR2_SIZE},
        {0, 0, R_028088_CB_COLOR2_VIEW},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_0280E8_CB_COLOR2_FRAG},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_0280C8_CB_COLOR2_TILE},
        {0, 0, R_028108_CB_COLOR2_MASK},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_02804C_CB_COLOR3_BASE},
-       {0, 0, R_0280AC_CB_COLOR3_INFO},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
+       {1, 0, R_0280AC_CB_COLOR3_INFO},
        {0, 0, R_02806C_CB_COLOR3_SIZE},
        {0, 0, R_02808C_CB_COLOR3_VIEW},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_0280EC_CB_COLOR3_FRAG},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_0280CC_CB_COLOR3_TILE},
        {0, 0, R_02810C_CB_COLOR3_MASK},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_028050_CB_COLOR4_BASE},
-       {0, 0, R_0280B0_CB_COLOR4_INFO},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
+       {1, 0, R_0280B0_CB_COLOR4_INFO},
        {0, 0, R_028070_CB_COLOR4_SIZE},
        {0, 0, R_028090_CB_COLOR4_VIEW},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_0280F0_CB_COLOR4_FRAG},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_0280D0_CB_COLOR4_TILE},
        {0, 0, R_028110_CB_COLOR4_MASK},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_028054_CB_COLOR5_BASE},
-       {0, 0, R_0280B4_CB_COLOR5_INFO},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
+       {1, 0, R_0280B4_CB_COLOR5_INFO},
        {0, 0, R_028074_CB_COLOR5_SIZE},
        {0, 0, R_028094_CB_COLOR5_VIEW},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_0280F4_CB_COLOR5_FRAG},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_0280D4_CB_COLOR5_TILE},
        {0, 0, R_028114_CB_COLOR5_MASK},
        {1, 0, R_028058_CB_COLOR6_BASE},
-       {0, 0, R_0280B8_CB_COLOR6_INFO},
+       {1, 0, R_0280B8_CB_COLOR6_INFO},
        {0, 0, R_028078_CB_COLOR6_SIZE},
        {0, 0, R_028098_CB_COLOR6_VIEW},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_0280F8_CB_COLOR6_FRAG},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_0280D8_CB_COLOR6_TILE},
        {0, 0, R_028118_CB_COLOR6_MASK},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
        {1, 0, R_02805C_CB_COLOR7_BASE},
-       {0, 0, R_0280BC_CB_COLOR7_INFO},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
+       {1, 0, R_0280BC_CB_COLOR7_INFO},
        {0, 0, R_02807C_CB_COLOR7_SIZE},
        {0, 0, R_02809C_CB_COLOR7_VIEW},
        {1, 0, R_0280FC_CB_COLOR7_FRAG},
@@ -313,7 +341,8 @@ static const struct r600_reg r600_reg_list[] = {
        {1, 0, R_02800C_DB_DEPTH_BASE},
        {0, 0, R_028000_DB_DEPTH_SIZE},
        {0, 0, R_028004_DB_DEPTH_VIEW},
-       {0, 0, R_028010_DB_DEPTH_INFO},
+       {0, 0, GROUP_FORCE_NEW_BLOCK},
+       {1, 0, R_028010_DB_DEPTH_INFO},
        {0, 0, R_028D0C_DB_RENDER_CONTROL},
        {0, 0, R_028D10_DB_RENDER_OVERRIDE},
        {0, 0, R_028D24_DB_HTILE_SURFACE},