r600g,radeonsi: add driver queries for GPU temperature and shader+memory clocks

[mesa.git] / src / gallium / winsys / radeon / drm / radeon_drm_winsys.c

diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index c207a85c6f46d59058d6eb333b2f8e1ad7e9a573..b3e3cb29429f82dd565a04c1870106802a204db8 100644 (file)
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -49,6 +49,13 @@
 #define RADEON_INFO_ACTIVE_CU_COUNT 0x20
 #endif
 
+#ifndef RADEON_INFO_CURRENT_GPU_TEMP
+#define RADEON_INFO_CURRENT_GPU_TEMP   0x21
+#define RADEON_INFO_CURRENT_GPU_SCLK   0x22
+#define RADEON_INFO_CURRENT_GPU_MCLK   0x23
+#define RADEON_INFO_READ_REG           0x24
+#endif
+
 static struct util_hash_table *fd_tab = NULL;
 pipe_static_mutex(fd_tab_mutex);
 
@@ -309,6 +316,21 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
        }
     }
 
+    /* Check for userptr support. */
+    {
+        struct drm_radeon_gem_userptr args = {0};
+
+        /* If the ioctl doesn't exist, -EINVAL is returned.
+         *
+         * If the ioctl exists, it should return -EACCES
+         * if RADEON_GEM_USERPTR_READONLY or RADEON_GEM_USERPTR_REGISTER
+         * aren't set.
+         */
+        ws->info.has_userptr =
+            drmCommandWriteRead(ws->fd, DRM_RADEON_GEM_USERPTR,
+                                &args, sizeof(args)) == -EACCES;
+    }
+
     /* Get GEM info. */
     retval = drmCommandWriteRead(ws->fd, DRM_RADEON_GEM_INFO,
             &gem_info, sizeof(gem_info));
@@ -325,6 +347,9 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
                          &ws->info.max_sclk);
     ws->info.max_sclk /= 1000;
 
+    radeon_get_drm_value(ws->fd, RADEON_INFO_SI_BACKEND_ENABLED_MASK, NULL,
+                         &ws->info.si_backend_enabled_mask);
+
     ws->num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
 
     /* Generation-specific queries. */
@@ -384,6 +409,8 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
     radeon_get_drm_value(ws->fd, RADEON_INFO_MAX_PIPES, NULL,
                          &ws->info.r600_max_pipes);
 
+    /* All GPUs have at least one compute unit */
+    ws->info.max_compute_units = 1;
     radeon_get_drm_value(ws->fd, RADEON_INFO_ACTIVE_CU_COUNT, NULL,
                          &ws->info.max_compute_units);
 
@@ -539,6 +566,18 @@ static uint64_t radeon_query_value(struct radeon_winsys *rws,
         radeon_get_drm_value(ws->fd, RADEON_INFO_GTT_USAGE,
                              "gtt-usage", (uint32_t*)&retval);
         return retval;
+    case RADEON_GPU_TEMPERATURE:
+        radeon_get_drm_value(ws->fd, RADEON_INFO_CURRENT_GPU_TEMP,
+                             "gpu-temp", (uint32_t*)&retval);
+        return retval;
+    case RADEON_CURRENT_SCLK:
+        radeon_get_drm_value(ws->fd, RADEON_INFO_CURRENT_GPU_SCLK,
+                             "current-gpu-sclk", (uint32_t*)&retval);
+        return retval;
+    case RADEON_CURRENT_MCLK:
+        radeon_get_drm_value(ws->fd, RADEON_INFO_CURRENT_GPU_MCLK,
+                             "current-gpu-mclk", (uint32_t*)&retval);
+        return retval;
     }
     return 0;
 }
@@ -668,7 +707,7 @@ radeon_drm_winsys_create(int fd, radeon_screen_create_t screen_create)
         goto fail;
 
     ws->cman = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0,
-                                       (ws->info.vram_size + ws->info.gart_size) / 8);
+                                       MIN2(ws->info.vram_size, ws->info.gart_size));
     if (!ws->cman)
         goto fail;