#include "util/hash_table.h"
#include "../list.h"
#include "GL/gl.h" /* GLenum */
+#include "util/list.h"
#include "util/ralloc.h"
#include "util/set.h"
#include "util/bitset.h"
#include "nir_types.h"
+#include "glsl/shader_enums.h"
#include <stdio.h>
#include "nir_opcodes.h"
*/
bool is_packed;
- /**
- * If this pointer is non-NULL then this register has exactly one
- * definition and that definition dominates all of its uses. This is
- * set by the out-of-SSA pass so that backends can get SSA-like
- * information even once they have gone out of SSA.
- */
- struct nir_instr *parent_instr;
-
/** set of nir_instr's where this register is used (read from) */
- struct set *uses;
+ struct list_head uses;
/** set of nir_instr's where this register is defined (written to) */
- struct set *defs;
+ struct list_head defs;
/** set of nir_if's where this register is used as a condition */
- struct set *if_uses;
+ struct list_head if_uses;
} nir_register;
typedef enum {
nir_instr *parent_instr;
/** set of nir_instr's where this register is used (read from) */
- struct set *uses;
+ struct list_head uses;
/** set of nir_if's where this register is used as a condition */
- struct set *if_uses;
+ struct list_head if_uses;
uint8_t num_components;
} nir_ssa_def;
} nir_reg_src;
typedef struct {
+ nir_instr *parent_instr;
+ struct list_head def_link;
+
nir_register *reg;
struct nir_src *indirect; /** < NULL for no indirect offset */
unsigned base_offset;
/* TODO def-use chain goes here */
} nir_reg_dest;
+struct nir_if;
+
typedef struct nir_src {
+ union {
+ nir_instr *parent_instr;
+ struct nir_if *parent_if;
+ };
+
+ struct list_head use_link;
+
union {
nir_reg_src reg;
nir_ssa_def *ssa;
bool is_ssa;
} nir_src;
+#define NIR_SRC_INIT (nir_src) { { NULL } }
+
+#define nir_foreach_use(reg_or_ssa_def, src) \
+ list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
+
+#define nir_foreach_use_safe(reg_or_ssa_def, src) \
+ list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
+
+#define nir_foreach_if_use(reg_or_ssa_def, src) \
+ list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
+
+#define nir_foreach_if_use_safe(reg_or_ssa_def, src) \
+ list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
+
typedef struct {
union {
nir_reg_dest reg;
bool is_ssa;
} nir_dest;
+#define NIR_DEST_INIT (nir_dest) { { { NULL } } }
+
+#define nir_foreach_def(reg, dest) \
+ list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
+
+#define nir_foreach_def_safe(reg, dest) \
+ list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
+
static inline nir_src
nir_src_for_ssa(nir_ssa_def *def)
{
- nir_src src;
+ nir_src src = NIR_SRC_INIT;
src.is_ssa = true;
src.ssa = def;
static inline nir_src
nir_src_for_reg(nir_register *reg)
{
- nir_src src;
+ nir_src src = NIR_SRC_INIT;
src.is_ssa = false;
src.reg.reg = reg;
static inline nir_dest
nir_dest_for_reg(nir_register *reg)
{
- nir_dest dest;
+ nir_dest dest = NIR_DEST_INIT;
- dest.is_ssa = false;
dest.reg.reg = reg;
- dest.reg.indirect = NULL;
- dest.reg.base_offset = 0;
return dest;
}
static inline unsigned
nir_tex_instr_dest_size(nir_tex_instr *instr)
{
- if (instr->op == nir_texop_txs) {
+ switch (instr->op) {
+ case nir_texop_txs: {
unsigned ret;
switch (instr->sampler_dim) {
case GLSL_SAMPLER_DIM_1D:
return ret;
}
- if (instr->op == nir_texop_query_levels)
+ case nir_texop_lod:
return 2;
- if (instr->is_shadow && instr->is_new_style_shadow)
+ case nir_texop_query_levels:
return 1;
- return 4;
+ default:
+ if (instr->is_shadow && instr->is_new_style_shadow)
+ return 1;
+
+ return 4;
+ }
}
static inline unsigned
#define nir_foreach_instr_safe(block, instr) \
foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
-typedef struct {
+typedef struct nir_if {
nir_cf_node cf_node;
nir_src condition;
typedef struct nir_shader_compiler_options {
bool lower_ffma;
+ bool lower_flrp;
bool lower_fpow;
bool lower_fsat;
bool lower_fsqrt;
/** lowers fneg and ineg to fsub and isub. */
bool lower_negate;
+ /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
+ bool lower_sub;
+
+ /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
+ bool lower_scmp;
+
+ /**
+ * Does the driver support real 32-bit integers? (Otherwise, integers
+ * are simulated by floats.)
+ */
+ bool native_integers;
} nir_shader_compiler_options;
typedef struct nir_shader {
/** hash table of name -> uniform nir_variable */
- struct hash_table *uniforms;
+ struct exec_list uniforms;
/** hash table of name -> input nir_variable */
- struct hash_table *inputs;
+ struct exec_list inputs;
/** hash table of name -> output nir_variable */
- struct hash_table *outputs;
+ struct exec_list outputs;
/** Set of driver-specific options for the shader.
*
* access plus one
*/
unsigned num_inputs, num_uniforms, num_outputs;
+
+ /** the number of uniforms that are only accessed directly */
+ unsigned num_direct_uniforms;
} nir_shader;
#define nir_foreach_overload(shader, overload) \
void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
/** creates an instruction with default swizzle/writemask/etc. with NULL registers */
-nir_alu_instr *nir_alu_instr_create(void *mem_ctx, nir_op op);
+nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
-nir_jump_instr *nir_jump_instr_create(void *mem_ctx, nir_jump_type type);
+nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
-nir_load_const_instr *nir_load_const_instr_create(void *mem_ctx,
+nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
unsigned num_components);
-nir_intrinsic_instr *nir_intrinsic_instr_create(void *mem_ctx,
+nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
nir_intrinsic_op op);
-nir_call_instr *nir_call_instr_create(void *mem_ctx,
+nir_call_instr *nir_call_instr_create(nir_shader *shader,
nir_function_overload *callee);
-nir_tex_instr *nir_tex_instr_create(void *mem_ctx, unsigned num_srcs);
+nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
-nir_phi_instr *nir_phi_instr_create(void *mem_ctx);
+nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
-nir_parallel_copy_instr *nir_parallel_copy_instr_create(void *mem_ctx);
+nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
-nir_ssa_undef_instr *nir_ssa_undef_instr_create(void *mem_ctx,
+nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
unsigned num_components);
nir_deref_var *nir_deref_var_create(void *mem_ctx, nir_variable *var);
nir_deref *nir_copy_deref(void *mem_ctx, nir_deref *deref);
+nir_load_const_instr *
+nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref);
+
void nir_instr_insert_before(nir_instr *instr, nir_instr *before);
void nir_instr_insert_after(nir_instr *instr, nir_instr *after);
nir_const_value *nir_src_as_const_value(nir_src src);
bool nir_srcs_equal(nir_src src1, nir_src src2);
void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
+void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
+void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
unsigned num_components, const char *name);
#ifdef DEBUG
void nir_validate_shader(nir_shader *shader);
#else
-static inline void nir_validate_shader(nir_shader *shader) { }
+static inline void nir_validate_shader(nir_shader *shader) { (void) shader; }
#endif /* DEBUG */
void nir_calc_dominance_impl(nir_function_impl *impl);
void nir_lower_locals_to_regs(nir_shader *shader);
+void nir_assign_var_locations_scalar(struct exec_list *var_list,
+ unsigned *size);
+void nir_assign_var_locations_scalar_direct_first(nir_shader *shader,
+ struct exec_list *var_list,
+ unsigned *direct_size,
+ unsigned *size);
+
void nir_lower_io(nir_shader *shader);
void nir_lower_vars_to_ssa(nir_shader *shader);
void nir_lower_phis_to_scalar(nir_shader *shader);
void nir_lower_samplers(nir_shader *shader,
- struct gl_shader_program *shader_program,
- struct gl_program *prog);
+ const struct gl_shader_program *shader_program,
+ gl_shader_stage stage);
void nir_lower_system_values(nir_shader *shader);
+void nir_lower_tex_projector(nir_shader *shader);
+void nir_lower_idiv(nir_shader *shader);
void nir_lower_atomics(nir_shader *shader);
void nir_lower_to_source_mods(nir_shader *shader);
+void nir_normalize_cubemap_coords(nir_shader *shader);
+
void nir_live_variables_impl(nir_function_impl *impl);
bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
void nir_convert_to_ssa_impl(nir_function_impl *impl);
void nir_convert_to_ssa(nir_shader *shader);
-void nir_convert_from_ssa(nir_shader *shader);
+
+/* If convert_everything is true, convert all values (even those not involved
+ * in a phi node) to registers. If false, only convert SSA values involved in
+ * phi nodes to registers.
+ */
+void nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
bool nir_opt_algebraic(nir_shader *shader);
+bool nir_opt_algebraic_late(nir_shader *shader);
bool nir_opt_constant_folding(nir_shader *shader);
bool nir_opt_global_to_local(nir_shader *shader);
bool nir_opt_remove_phis(nir_shader *shader);
+void nir_sweep(nir_shader *shader);
+
#ifdef __cplusplus
} /* extern "C" */
#endif
projects / mesa.git / blobdiff