*/
#include "nir.h"
+#include "nir_control_flow.h"
/*
* Implements a small peephole optimization that looks for
};
static bool
-are_all_move_to_phi(nir_block *block)
+block_check_for_allowed_instrs(nir_block *block)
{
nir_foreach_instr(block, instr) {
- if (instr->type != nir_instr_type_alu)
- return false;
+ switch (instr->type) {
+ case nir_instr_type_intrinsic: {
+ nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
+
+ switch (intrin->intrinsic) {
+ case nir_intrinsic_load_var:
+ switch (intrin->variables[0]->var->data.mode) {
+ case nir_var_shader_in:
+ case nir_var_uniform:
+ break;
+
+ default:
+ return false;
+ }
+ break;
+
+ default:
+ return false;
+ }
- /* It must be a move operation */
- nir_alu_instr *mov = nir_instr_as_alu(instr);
- if (mov->op != nir_op_fmov && mov->op != nir_op_imov)
- return false;
+ break;
+ }
- /* Can't handle saturate */
- if (mov->dest.saturate)
- return false;
+ case nir_instr_type_load_const:
+ break;
- /* It must be SSA */
- if (!mov->dest.dest.is_ssa)
- return false;
+ case nir_instr_type_alu: {
+ nir_alu_instr *mov = nir_instr_as_alu(instr);
+ switch (mov->op) {
+ case nir_op_fmov:
+ case nir_op_imov:
+ case nir_op_fneg:
+ case nir_op_ineg:
+ case nir_op_fabs:
+ case nir_op_iabs:
+ case nir_op_vec2:
+ case nir_op_vec3:
+ case nir_op_vec4:
+ /* It must be a move-like operation. */
+ break;
+ default:
+ return false;
+ }
- /* It cannot have any if-uses */
- if (mov->dest.dest.ssa.if_uses->entries != 0)
- return false;
+ /* Can't handle saturate */
+ if (mov->dest.saturate)
+ return false;
+
+ /* It must be SSA */
+ if (!mov->dest.dest.is_ssa)
+ return false;
- /* The only uses of this definition must be phi's in the successor */
- struct set_entry *entry;
- set_foreach(mov->dest.dest.ssa.uses, entry) {
- const nir_instr *dest_instr = entry->key;
- if (dest_instr->type != nir_instr_type_phi ||
- dest_instr->block != block->successors[0])
+ /* It cannot have any if-uses */
+ if (!list_empty(&mov->dest.dest.ssa.if_uses))
return false;
+
+ /* The only uses of this definition must be phi's in the successor */
+ nir_foreach_use(&mov->dest.dest.ssa, use) {
+ if (use->parent_instr->type != nir_instr_type_phi ||
+ use->parent_instr->block != block->successors[0])
+ return false;
+ }
+ break;
+ }
+
+ default:
+ return false;
}
}
nir_block *then_block = nir_cf_node_as_block(then_node);
nir_block *else_block = nir_cf_node_as_block(else_node);
- /* ... and those blocks must only contain move-to-phi. */
- if (!are_all_move_to_phi(then_block) || !are_all_move_to_phi(else_block))
+ /* ... and those blocks must only contain "allowed" instructions. */
+ if (!block_check_for_allowed_instrs(then_block) ||
+ !block_check_for_allowed_instrs(else_block))
return true;
/* At this point, we know that the previous CFG node is an if-then
* selects.
*/
+ nir_block *prev_block = nir_cf_node_as_block(nir_cf_node_prev(prev_node));
+ assert(prev_block->cf_node.type == nir_cf_node_block);
+
+ /* First, we move the remaining instructions from the blocks to the
+ * block before. We have already guaranteed that this is safe by
+ * calling block_check_for_allowed_instrs()
+ */
+ nir_foreach_instr_safe(then_block, instr) {
+ exec_node_remove(&instr->node);
+ instr->block = prev_block;
+ exec_list_push_tail(&prev_block->instr_list, &instr->node);
+ }
+
+ nir_foreach_instr_safe(else_block, instr) {
+ exec_node_remove(&instr->node);
+ instr->block = prev_block;
+ exec_list_push_tail(&prev_block->instr_list, &instr->node);
+ }
+
nir_foreach_instr_safe(block, instr) {
if (instr->type != nir_instr_type_phi)
break;
nir_phi_instr *phi = nir_instr_as_phi(instr);
nir_alu_instr *sel = nir_alu_instr_create(state->mem_ctx, nir_op_bcsel);
- sel->src[0].src = nir_src_copy(if_stmt->condition, state->mem_ctx);
+ nir_src_copy(&sel->src[0].src, &if_stmt->condition, sel);
/* Splat the condition to all channels */
memset(sel->src[0].swizzle, 0, sizeof sel->src[0].swizzle);
assert(src->src.is_ssa);
unsigned idx = src->pred == then_block ? 1 : 2;
-
- if (src->src.ssa->parent_instr->block == src->pred) {
- /* We already know that this instruction must be a move with
- * this phi's in this block as its only users.
- */
- nir_alu_instr *mov = nir_instr_as_alu(src->src.ssa->parent_instr);
- assert(mov->instr.type == nir_instr_type_alu);
- assert(mov->op == nir_op_fmov || mov->op == nir_op_imov);
-
- sel->src[idx].src = nir_src_copy(mov->src[0].src, state->mem_ctx);
- sel->src[idx].negate = mov->src[0].negate;
- sel->src[idx].abs = mov->src[0].abs;
- memcpy(sel->src[idx].swizzle, mov->src[0].swizzle, 4);
- } else {
- sel->src[idx].src = nir_src_copy(src->src, state->mem_ctx);
- }
+ nir_src_copy(&sel->src[idx].src, &src->src, sel);
}
nir_ssa_dest_init(&sel->instr, &sel->dest.dest,
sel->dest.write_mask = (1 << phi->dest.ssa.num_components) - 1;
nir_ssa_def_rewrite_uses(&phi->dest.ssa,
- nir_src_for_ssa(&sel->dest.dest.ssa),
- state->mem_ctx);
+ nir_src_for_ssa(&sel->dest.dest.ssa));
nir_instr_insert_before(&phi->instr, &sel->instr);
nir_instr_remove(&phi->instr);
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