blorp_nir_tex(nir_builder *b, struct brw_blorp_blit_vars *v,
const struct brw_blorp_blit_prog_key *key, nir_ssa_def *pos)
{
+ if (key->need_src_offset)
+ pos = nir_fadd(b, pos, nir_i2f32(b, nir_load_var(b, v->v_src_offset)));
+
/* If the sampler requires normalized coordinates, we need to compensate. */
if (key->src_coords_normalized)
pos = nir_fmul(b, pos, nir_load_var(b, v->v_src_inv_size));
* representing the four samples that maxe up a pixel. So we need
* to multiply our X and Y coordinates each by 2 and then add 1.
*/
- src_pos = nir_ishl(&b, src_pos, nir_imm_int(&b, 1));
- src_pos = nir_iadd(&b, src_pos, nir_imm_int(&b, 1));
- src_pos = nir_i2f32(&b, src_pos);
+ assert(key->src_coords_normalized);
+ src_pos = nir_fadd(&b,
+ nir_i2f32(&b, src_pos),
+ nir_imm_float(&b, 0.5f));
color = blorp_nir_tex(&b, &v, key, src_pos);
} else {
/* Gen7+ hardware doesn't automaticaly blend. */
else
layer = info->view.base_array_layer;
- uint32_t x_offset_sa, y_offset_sa;
- isl_surf_get_image_offset_sa(&info->surf, info->view.base_level,
- layer, z, &x_offset_sa, &y_offset_sa);
-
uint32_t byte_offset;
- isl_tiling_get_intratile_offset_sa(isl_dev, info->surf.tiling,
- info->surf.format, info->surf.row_pitch,
- x_offset_sa, y_offset_sa,
- &byte_offset,
- &info->tile_x_sa, &info->tile_y_sa);
+ isl_surf_get_image_surf(isl_dev, &info->surf,
+ info->view.base_level, layer, z,
+ &info->surf,
+ &byte_offset, &info->tile_x_sa, &info->tile_y_sa);
info->addr.offset += byte_offset;
- const uint32_t slice_width_px =
- minify(info->surf.logical_level0_px.width, info->view.base_level);
- const uint32_t slice_height_px =
- minify(info->surf.logical_level0_px.height, info->view.base_level);
-
uint32_t tile_x_px, tile_y_px;
surf_get_intratile_offset_px(info, &tile_x_px, &tile_y_px);
- struct isl_surf_init_info init_info = {
- .dim = ISL_SURF_DIM_2D,
- .format = info->surf.format,
- .width = slice_width_px + tile_x_px,
- .height = slice_height_px + tile_y_px,
- .depth = 1,
- .levels = 1,
- .array_len = 1,
- .samples = info->surf.samples,
- .row_pitch = info->surf.row_pitch,
- .usage = info->surf.usage,
- .tiling_flags = 1 << info->surf.tiling,
- };
-
- ok = isl_surf_init_s(isl_dev, &info->surf, &init_info);
- assert(ok);
+ /* Instead of using the X/Y Offset fields in RENDER_SURFACE_STATE, we place
+ * the image at the tile boundary and offset our sampling or rendering.
+ * For this reason, we need to grow the image by the offset to ensure that
+ * the hardware doesn't think we've gone past the edge.
+ */
+ info->surf.logical_level0_px.w += tile_x_px;
+ info->surf.logical_level0_px.h += tile_y_px;
+ info->surf.phys_level0_sa.w += info->tile_x_sa;
+ info->surf.phys_level0_sa.h += info->tile_y_sa;
/* The view is also different now. */
info->view.base_level = 0;
info->surf.logical_level0_px.width *= 3;
info->surf.phys_level0_sa.width *= 3;
+ info->tile_x_sa *= 3;
*x *= 3;
*width *= 3;
/* The MinLOD and MinimumArrayElement don't work properly for cube maps.
* Convert them to a single slice on gen4.
*/
- if (params->dst.surf.usage & ISL_SURF_USAGE_CUBE_BIT)
+ if (params->dst.surf.usage & ISL_SURF_USAGE_CUBE_BIT) {
blorp_surf_convert_to_single_slice(batch->blorp->isl_dev, ¶ms->dst);
+ wm_prog_key->need_dst_offset = true;
+ }
- if (params->src.surf.usage & ISL_SURF_USAGE_CUBE_BIT)
+ if (params->src.surf.usage & ISL_SURF_USAGE_CUBE_BIT) {
blorp_surf_convert_to_single_slice(batch->blorp->isl_dev, ¶ms->src);
+ wm_prog_key->need_src_offset = true;
+ }
}
if (devinfo->gen > 6 &&
params->num_samples = params->dst.surf.samples;
+ if ((wm_prog_key->bilinear_filter ||
+ (wm_prog_key->blend && !wm_prog_key->blit_scaled)) &&
+ batch->blorp->isl_dev->info->gen <= 6) {
+ /* Gen4-5 don't support non-normalized texture coordinates */
+ wm_prog_key->src_coords_normalized = true;
+ params->wm_inputs.src_inv_size[0] =
+ 1.0f / minify(params->src.surf.logical_level0_px.width,
+ params->src.view.base_level);
+ params->wm_inputs.src_inv_size[1] =
+ 1.0f / minify(params->src.surf.logical_level0_px.height,
+ params->src.view.base_level);
+ }
+
if (params->src.tile_x_sa || params->src.tile_y_sa) {
assert(wm_prog_key->need_src_offset);
surf_get_intratile_offset_px(¶ms->src,
*/
x_offset_sa = (uint32_t)*x0 * px_size_sa.w + info->tile_x_sa;
y_offset_sa = (uint32_t)*y0 * px_size_sa.h + info->tile_y_sa;
- isl_tiling_get_intratile_offset_sa(dev, info->surf.tiling,
+ isl_tiling_get_intratile_offset_sa(info->surf.tiling,
info->surf.format, info->surf.row_pitch,
x_offset_sa, y_offset_sa,
&byte_offset,
struct blorp_params params;
blorp_params_init(¶ms);
+ /* We cannot handle combined depth and stencil. */
+ if (src_surf->surf->usage & ISL_SURF_USAGE_STENCIL_BIT)
+ assert(src_surf->surf->format == ISL_FORMAT_R8_UINT);
+ if (dst_surf->surf->usage & ISL_SURF_USAGE_STENCIL_BIT)
+ assert(dst_surf->surf->format == ISL_FORMAT_R8_UINT);
+
if (dst_surf->surf->usage & ISL_SURF_USAGE_STENCIL_BIT) {
assert(src_surf->surf->usage & ISL_SURF_USAGE_STENCIL_BIT);
/* Prior to Broadwell, we can't render to R8_UINT */
if (filter == GL_LINEAR &&
params.src.surf.samples <= 1 && params.dst.surf.samples <= 1) {
wm_prog_key.bilinear_filter = true;
-
- if (batch->blorp->isl_dev->info->gen < 6) {
- /* Gen4-5 don't support non-normalized texture coordinates */
- wm_prog_key.src_coords_normalized = true;
- params.wm_inputs.src_inv_size[0] =
- 1.0f / minify(params.src.surf.logical_level0_px.width, src_level);
- params.wm_inputs.src_inv_size[1] =
- 1.0f / minify(params.src.surf.logical_level0_px.height, src_level);
- }
}
if ((params.src.surf.usage & ISL_SURF_USAGE_DEPTH_BIT) == 0 &&
return bits;
}
-static void
-surf_convert_to_uncompressed(const struct isl_device *isl_dev,
- struct brw_blorp_surface_info *info,
- uint32_t *x, uint32_t *y,
- uint32_t *width, uint32_t *height)
+void
+blorp_surf_convert_to_uncompressed(const struct isl_device *isl_dev,
+ struct brw_blorp_surface_info *info,
+ uint32_t *x, uint32_t *y,
+ uint32_t *width, uint32_t *height)
{
const struct isl_format_layout *fmtl =
isl_format_get_layout(info->surf.format);
*height = DIV_ROUND_UP(*height, fmtl->bh);
}
- assert(*x % fmtl->bw == 0);
- assert(*y % fmtl->bh == 0);
- *x /= fmtl->bw;
- *y /= fmtl->bh;
+ if (x || y) {
+ assert(*x % fmtl->bw == 0);
+ assert(*y % fmtl->bh == 0);
+ *x /= fmtl->bw;
+ *y /= fmtl->bh;
+ }
info->surf.logical_level0_px.width =
DIV_ROUND_UP(info->surf.logical_level0_px.width, fmtl->bw);
}
if (params.src.aux_usage == ISL_AUX_USAGE_CCS_E) {
+ /* It's safe to do a blorp_copy between things which are sRGB with CCS_E
+ * enabled even though CCS_E doesn't technically do sRGB on SKL because
+ * we stomp everything to UINT anyway. The one thing we have to be
+ * careful of is clear colors. Because fast clear colors for sRGB on
+ * gen9 are encoded as the float values between format conversion and
+ * sRGB curve application, a given clear color float will convert to the
+ * same bits regardless of whether the format is UNORM or sRGB.
+ * Therefore, we can handle sRGB without any special cases.
+ */
+ UNUSED enum isl_format linear_src_format =
+ isl_format_srgb_to_linear(src_surf->surf->format);
assert(isl_formats_are_ccs_e_compatible(batch->blorp->isl_dev->info,
- src_surf->surf->format,
+ linear_src_format,
params.src.view.format));
params.src.clear_color =
bitcast_color_value_to_uint(params.src.clear_color, src_fmtl);
}
if (params.dst.aux_usage == ISL_AUX_USAGE_CCS_E) {
+ /* See above where we handle linear_src_format */
+ UNUSED enum isl_format linear_dst_format =
+ isl_format_srgb_to_linear(dst_surf->surf->format);
assert(isl_formats_are_ccs_e_compatible(batch->blorp->isl_dev->info,
- dst_surf->surf->format,
+ linear_dst_format,
params.dst.view.format));
params.dst.clear_color =
bitcast_color_value_to_uint(params.dst.clear_color, dst_fmtl);
isl_format_get_layout(params.dst.view.format)->channels.r.bits;
if (src_fmtl->bw > 1 || src_fmtl->bh > 1) {
- surf_convert_to_uncompressed(batch->blorp->isl_dev, ¶ms.src,
- &src_x, &src_y, &src_width, &src_height);
+ blorp_surf_convert_to_uncompressed(batch->blorp->isl_dev, ¶ms.src,
+ &src_x, &src_y,
+ &src_width, &src_height);
wm_prog_key.need_src_offset = true;
}
if (dst_fmtl->bw > 1 || dst_fmtl->bh > 1) {
- surf_convert_to_uncompressed(batch->blorp->isl_dev, ¶ms.dst,
- &dst_x, &dst_y, NULL, NULL);
+ blorp_surf_convert_to_uncompressed(batch->blorp->isl_dev, ¶ms.dst,
+ &dst_x, &dst_y, NULL, NULL);
wm_prog_key.need_dst_offset = true;
}
do_blorp_blit(batch, ¶ms, &wm_prog_key, &coords);
}
+
+static enum isl_format
+isl_format_for_size(unsigned size_B)
+{
+ switch (size_B) {
+ case 1: return ISL_FORMAT_R8_UINT;
+ case 2: return ISL_FORMAT_R8G8_UINT;
+ case 4: return ISL_FORMAT_R8G8B8A8_UINT;
+ case 8: return ISL_FORMAT_R16G16B16A16_UINT;
+ case 16: return ISL_FORMAT_R32G32B32A32_UINT;
+ default:
+ unreachable("Not a power-of-two format size");
+ }
+}
+
+/**
+ * Returns the greatest common divisor of a and b that is a power of two.
+ */
+static uint64_t
+gcd_pow2_u64(uint64_t a, uint64_t b)
+{
+ assert(a > 0 || b > 0);
+
+ unsigned a_log2 = ffsll(a) - 1;
+ unsigned b_log2 = ffsll(b) - 1;
+
+ /* If either a or b is 0, then a_log2 or b_log2 till be UINT_MAX in which
+ * case, the MIN2() will take the other one. If both are 0 then we will
+ * hit the assert above.
+ */
+ return 1 << MIN2(a_log2, b_log2);
+}
+
+static void
+do_buffer_copy(struct blorp_batch *batch,
+ struct blorp_address *src,
+ struct blorp_address *dst,
+ int width, int height, int block_size)
+{
+ /* The actual format we pick doesn't matter as blorp will throw it away.
+ * The only thing that actually matters is the size.
+ */
+ enum isl_format format = isl_format_for_size(block_size);
+
+ UNUSED bool ok;
+ struct isl_surf surf;
+ ok = isl_surf_init(batch->blorp->isl_dev, &surf,
+ .dim = ISL_SURF_DIM_2D,
+ .format = format,
+ .width = width,
+ .height = height,
+ .depth = 1,
+ .levels = 1,
+ .array_len = 1,
+ .samples = 1,
+ .row_pitch = width * block_size,
+ .usage = ISL_SURF_USAGE_TEXTURE_BIT |
+ ISL_SURF_USAGE_RENDER_TARGET_BIT,
+ .tiling_flags = ISL_TILING_LINEAR_BIT);
+ assert(ok);
+
+ struct blorp_surf src_blorp_surf = {
+ .surf = &surf,
+ .addr = *src,
+ };
+
+ struct blorp_surf dst_blorp_surf = {
+ .surf = &surf,
+ .addr = *dst,
+ };
+
+ blorp_copy(batch, &src_blorp_surf, 0, 0, &dst_blorp_surf, 0, 0,
+ 0, 0, 0, 0, width, height);
+}
+
+void
+blorp_buffer_copy(struct blorp_batch *batch,
+ struct blorp_address src,
+ struct blorp_address dst,
+ uint64_t size)
+{
+ const struct gen_device_info *devinfo = batch->blorp->isl_dev->info;
+ uint64_t copy_size = size;
+
+ /* This is maximum possible width/height our HW can handle */
+ uint64_t max_surface_dim = 1 << (devinfo->gen >= 7 ? 14 : 13);
+
+ /* First, we compute the biggest format that can be used with the
+ * given offsets and size.
+ */
+ int bs = 16;
+ bs = gcd_pow2_u64(bs, src.offset);
+ bs = gcd_pow2_u64(bs, dst.offset);
+ bs = gcd_pow2_u64(bs, size);
+
+ /* First, we make a bunch of max-sized copies */
+ uint64_t max_copy_size = max_surface_dim * max_surface_dim * bs;
+ while (copy_size >= max_copy_size) {
+ do_buffer_copy(batch, &src, &dst, max_surface_dim, max_surface_dim, bs);
+ copy_size -= max_copy_size;
+ src.offset += max_copy_size;
+ dst.offset += max_copy_size;
+ }
+
+ /* Now make a max-width copy */
+ uint64_t height = copy_size / (max_surface_dim * bs);
+ assert(height < max_surface_dim);
+ if (height != 0) {
+ uint64_t rect_copy_size = height * max_surface_dim * bs;
+ do_buffer_copy(batch, &src, &dst, max_surface_dim, height, bs);
+ copy_size -= rect_copy_size;
+ src.offset += rect_copy_size;
+ dst.offset += rect_copy_size;
+ }
+
+ /* Finally, make a small copy to finish it off */
+ if (copy_size != 0) {
+ do_buffer_copy(batch, &src, &dst, copy_size / bs, 1, bs);
+ }
+}
projects / mesa.git / blobdiff