{{ 0 }}
};
+/**
+ * TGL validated L3 configurations. \sa tgl_l3_configs.
+ */
+static const struct gen_l3_config tgl_l3_configs[] = {
+ /* SLM URB ALL DC RO IS C T */
+ {{ 0, 32, 88, 0, 0, 0, 0, 0 }},
+ {{ 0, 16, 104, 0, 0, 0, 0, 0 }},
+ {{ 0 }}
+};
/**
* Return a zero-terminated array of validated L3 configurations for the
case 11:
return icl_l3_configs;
+ case 12:
+ return tgl_l3_configs;
+
default:
unreachable("Not implemented");
}
get_l3_way_size(const struct gen_device_info *devinfo)
{
const unsigned way_size_per_bank =
- (devinfo->gen >= 9 && devinfo->l3_banks == 1) || devinfo->gen == 11 ?
+ (devinfo->gen >= 9 && devinfo->l3_banks == 1) || devinfo->gen >= 11 ?
4 : 2;
assert(devinfo->l3_banks);