.vectorize_io = true, \
.use_interpolated_input_intrinsics = true, \
.vertex_id_zero_based = true, \
- .lower_base_vertex = true
+ .lower_base_vertex = true, \
+ .use_scoped_barrier = true, \
+ .support_8bit_alu = true, \
+ .support_16bit_alu = true
#define COMMON_SCALAR_OPTIONS \
.lower_to_scalar = true, \
.lower_unpack_snorm_4x8 = true, \
.lower_unpack_unorm_2x16 = true, \
.lower_unpack_unorm_4x8 = true, \
+ .lower_usub_sat64 = true, \
+ .lower_hadd64 = true, \
+ .lower_bfe_with_two_constants = true, \
.max_unroll_iterations = 32
static const struct nir_shader_compiler_options scalar_nir_options = {
if (devinfo->gen >= 10) {
/* We don't support vec4 mode on Cannonlake. */
- for (int i = MESA_SHADER_VERTEX; i < MESA_SHADER_STAGES; i++)
+ for (int i = MESA_SHADER_VERTEX; i < MESA_ALL_SHADER_STAGES; i++)
compiler->scalar_stage[i] = true;
} else {
compiler->scalar_stage[MESA_SHADER_VERTEX] =
nir_lower_ddiv;
if (!devinfo->has_64bit_float || (INTEL_DEBUG & DEBUG_SOFT64)) {
- int64_options |= nir_lower_mov64 |
- nir_lower_icmp64 |
- nir_lower_iadd64 |
- nir_lower_iabs64 |
- nir_lower_ineg64 |
- nir_lower_logic64 |
- nir_lower_minmax64 |
- nir_lower_shift64 |
- nir_lower_extract64;
+ int64_options |= (nir_lower_int64_options)~0;
fp64_options |= nir_lower_fp64_full_software;
}
int64_options |= nir_lower_imul_2x32_64;
/* We want the GLSL compiler to emit code that uses condition codes */
- for (int i = 0; i < MESA_SHADER_STAGES; i++) {
+ for (int i = 0; i < MESA_ALL_SHADER_STAGES; i++) {
compiler->glsl_compiler_options[i].MaxUnrollIterations = 0;
compiler->glsl_compiler_options[i].MaxIfDepth =
devinfo->gen < 6 ? 16 : UINT_MAX;
unsigned
brw_prog_data_size(gl_shader_stage stage)
{
- STATIC_ASSERT(MESA_SHADER_VERTEX == 0);
- STATIC_ASSERT(MESA_SHADER_TESS_CTRL == 1);
- STATIC_ASSERT(MESA_SHADER_TESS_EVAL == 2);
- STATIC_ASSERT(MESA_SHADER_GEOMETRY == 3);
- STATIC_ASSERT(MESA_SHADER_FRAGMENT == 4);
- STATIC_ASSERT(MESA_SHADER_COMPUTE == 5);
static const size_t stage_sizes[] = {
- sizeof(struct brw_vs_prog_data),
- sizeof(struct brw_tcs_prog_data),
- sizeof(struct brw_tes_prog_data),
- sizeof(struct brw_gs_prog_data),
- sizeof(struct brw_wm_prog_data),
- sizeof(struct brw_cs_prog_data),
+ [MESA_SHADER_VERTEX] = sizeof(struct brw_vs_prog_data),
+ [MESA_SHADER_TESS_CTRL] = sizeof(struct brw_tcs_prog_data),
+ [MESA_SHADER_TESS_EVAL] = sizeof(struct brw_tes_prog_data),
+ [MESA_SHADER_GEOMETRY] = sizeof(struct brw_gs_prog_data),
+ [MESA_SHADER_FRAGMENT] = sizeof(struct brw_wm_prog_data),
+ [MESA_SHADER_COMPUTE] = sizeof(struct brw_cs_prog_data),
+ [MESA_SHADER_KERNEL] = sizeof(struct brw_cs_prog_data),
};
assert((int)stage >= 0 && stage < ARRAY_SIZE(stage_sizes));
return stage_sizes[stage];
brw_prog_key_size(gl_shader_stage stage)
{
static const size_t stage_sizes[] = {
- sizeof(struct brw_vs_prog_key),
- sizeof(struct brw_tcs_prog_key),
- sizeof(struct brw_tes_prog_key),
- sizeof(struct brw_gs_prog_key),
- sizeof(struct brw_wm_prog_key),
- sizeof(struct brw_cs_prog_key),
+ [MESA_SHADER_VERTEX] = sizeof(struct brw_vs_prog_key),
+ [MESA_SHADER_TESS_CTRL] = sizeof(struct brw_tcs_prog_key),
+ [MESA_SHADER_TESS_EVAL] = sizeof(struct brw_tes_prog_key),
+ [MESA_SHADER_GEOMETRY] = sizeof(struct brw_gs_prog_key),
+ [MESA_SHADER_FRAGMENT] = sizeof(struct brw_wm_prog_key),
+ [MESA_SHADER_COMPUTE] = sizeof(struct brw_cs_prog_key),
+ [MESA_SHADER_KERNEL] = sizeof(struct brw_cs_prog_key),
};
assert((int)stage >= 0 && stage < ARRAY_SIZE(stage_sizes));
return stage_sizes[stage];