i965/fs: Implement ARB_shader_ballot operations

[mesa.git] / src / intel / compiler / brw_compiler.c

diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c
index aa896b9a336fe1f5eb2430b9fe35d2ddfa514228..39a8237ff07162f75ab91bd67c3e07876dc7ec29 100644 (file)
--- a/src/intel/compiler/brw_compiler.c
+++ b/src/intel/compiler/brw_compiler.c
@@ -57,6 +57,7 @@ static const struct nir_shader_compiler_options scalar_nir_options = {
    .lower_unpack_snorm_4x8 = true,
    .lower_unpack_unorm_2x16 = true,
    .lower_unpack_unorm_4x8 = true,
+   .lower_subgroup_masks = true,
    .max_unroll_iterations = 32,
 };
 
@@ -78,6 +79,7 @@ static const struct nir_shader_compiler_options vector_nir_options = {
    .lower_unpack_unorm_2x16 = true,
    .lower_extract_byte = true,
    .lower_extract_word = true,
+   .lower_vote_trivial = true,
    .max_unroll_iterations = 32,
 };
 
@@ -118,7 +120,7 @@ brw_compiler_create(void *mem_ctx, const struct gen_device_info *devinfo)
          compiler->scalar_stage[i] = true;
    } else {
       compiler->scalar_stage[MESA_SHADER_VERTEX] =
-         devinfo->gen >= 8 && !(INTEL_DEBUG & DEBUG_VEC4VS);
+         devinfo->gen >= 8 && env_var_as_boolean("INTEL_SCALAR_VS", true);
       compiler->scalar_stage[MESA_SHADER_TESS_CTRL] =
          devinfo->gen >= 8 && env_var_as_boolean("INTEL_SCALAR_TCS", true);
       compiler->scalar_stage[MESA_SHADER_TESS_EVAL] =