void (*shader_perf_log)(void *, const char *str, ...) PRINTFLIKE(2, 3);
bool scalar_stage[MESA_SHADER_STAGES];
+ bool use_tcs_8_patch;
struct gl_shader_compiler_options glsl_compiler_options[MESA_SHADER_STAGES];
/**
uint32_t y_uv_image_mask;
uint32_t yx_xuxv_image_mask;
uint32_t xy_uxvx_image_mask;
+ uint32_t ayuv_image_mask;
+ uint32_t xyuv_image_mask;
+
+ /* Scale factor for each texture. */
+ float scale_factors[32];
+};
+
+/** An enum representing what kind of input gl_SubgroupSize is. */
+enum PACKED brw_subgroup_size_type
+{
+ BRW_SUBGROUP_SIZE_API_CONSTANT, /**< Default Vulkan behavior */
+ BRW_SUBGROUP_SIZE_UNIFORM, /**< OpenGL behavior */
+ BRW_SUBGROUP_SIZE_VARYING, /**< VK_EXT_subgroup_size_control */
+
+ /* These enums are specifically chosen so that the value of the enum is
+ * also the subgroup size. If any new values are added, they must respect
+ * this invariant.
+ */
+ BRW_SUBGROUP_SIZE_REQUIRE_8 = 8, /**< VK_EXT_subgroup_size_control */
+ BRW_SUBGROUP_SIZE_REQUIRE_16 = 16, /**< VK_EXT_subgroup_size_control */
+ BRW_SUBGROUP_SIZE_REQUIRE_32 = 32, /**< VK_EXT_subgroup_size_control */
+};
+
+struct brw_base_prog_key {
+ unsigned program_string_id;
+
+ enum brw_subgroup_size_type subgroup_size_type;
+
+ struct brw_sampler_prog_key_data tex;
};
/**
/** The program key for Vertex Shaders. */
struct brw_vs_prog_key {
- unsigned program_string_id;
+ struct brw_base_prog_key base;
/**
* Per-attribute workaround flags
* the VUE, even if they aren't written by the vertex shader.
*/
uint8_t point_coord_replace;
-
- struct brw_sampler_prog_key_data tex;
};
/** The program key for Tessellation Control Shaders. */
struct brw_tcs_prog_key
{
- unsigned program_string_id;
+ struct brw_base_prog_key base;
GLenum tes_primitive_mode;
uint64_t outputs_written;
bool quads_workaround;
-
- struct brw_sampler_prog_key_data tex;
};
/** The program key for Tessellation Evaluation Shaders. */
struct brw_tes_prog_key
{
- unsigned program_string_id;
+ struct brw_base_prog_key base;
/** A bitfield of per-patch inputs read. */
uint32_t patch_inputs_read;
/** A bitfield of per-vertex inputs read. */
uint64_t inputs_read;
- struct brw_sampler_prog_key_data tex;
+ /**
+ * How many user clipping planes are being uploaded to the tessellation
+ * evaluation shader as push constants.
+ *
+ * These are used for lowering legacy gl_ClipVertex/gl_Position clipping to
+ * clip distances.
+ */
+ unsigned nr_userclip_plane_consts:4;
};
/** The program key for Geometry Shaders. */
struct brw_gs_prog_key
{
- unsigned program_string_id;
+ struct brw_base_prog_key base;
- struct brw_sampler_prog_key_data tex;
+ /**
+ * How many user clipping planes are being uploaded to the geometry shader
+ * as push constants.
+ *
+ * These are used for lowering legacy gl_ClipVertex/gl_Position clipping to
+ * clip distances.
+ */
+ unsigned nr_userclip_plane_consts:4;
};
enum brw_sf_primitive {
/** The program key for Fragment/Pixel Shaders. */
struct brw_wm_prog_key {
+ struct brw_base_prog_key base;
+
/* Some collection of BRW_WM_IZ_* */
uint8_t iz_lookup;
bool stats_wm:1;
bool flat_shade:1;
unsigned nr_color_regions:5;
- bool replicate_alpha:1;
+ bool alpha_test_replicate_alpha:1;
+ bool alpha_to_coverage:1;
bool clamp_fragment_color:1;
bool persample_interp:1;
bool multisample_fbo:1;
uint8_t color_outputs_valid;
uint64_t input_slots_valid;
- unsigned program_string_id;
GLenum alpha_test_func; /* < For Gen4/5 MRT alpha test */
float alpha_test_ref;
-
- struct brw_sampler_prog_key_data tex;
};
struct brw_cs_prog_key {
- uint32_t program_string_id;
- struct brw_sampler_prog_key_data tex;
+ struct brw_base_prog_key base;
};
/* brw_any_prog_key is any of the keys that map to an API stage */
union brw_any_prog_key {
+ struct brw_base_prog_key base;
struct brw_vs_prog_key vs;
struct brw_tcs_prog_key tcs;
struct brw_tes_prog_key tes;
BRW_PARAM_BUILTIN_TESS_LEVEL_INNER_X,
BRW_PARAM_BUILTIN_TESS_LEVEL_INNER_Y,
+ BRW_PARAM_BUILTIN_PATCH_VERTICES_IN,
+
BRW_PARAM_BUILTIN_BASE_WORK_GROUP_ID_X,
BRW_PARAM_BUILTIN_BASE_WORK_GROUP_ID_Y,
BRW_PARAM_BUILTIN_BASE_WORK_GROUP_ID_Z,
unsigned program_size;
+ /** Does this program pull from any UBO or other constant buffers? */
+ bool has_ubo_pull;
+
/**
* Register where the thread expects to find input data from the URB
* (typically uniforms, followed by vertex or fragment attributes).
return prog_data->param + old_nr_params;
}
-static inline void
-brw_mark_surface_used(struct brw_stage_prog_data *prog_data,
- unsigned surf_index)
-{
- /* A binding table index is 8 bits and the top 3 values are reserved for
- * special things (stateless and SLM).
- */
- assert(surf_index <= 252);
-
- prog_data->binding_table.size_bytes =
- MAX2(prog_data->binding_table.size_bytes, (surf_index + 1) * 4);
-}
-
enum brw_barycentric_mode {
BRW_BARYCENTRIC_PERSPECTIVE_PIXEL = 0,
BRW_BARYCENTRIC_PERSPECTIVE_CENTROID = 1,
bool dispatch_16;
bool dispatch_32;
bool dual_src_blend;
+ bool replicate_alpha;
bool persample_dispatch;
bool uses_pos_offset;
bool uses_omask;
unsigned local_size[3];
unsigned simd_size;
unsigned threads;
+ unsigned slm_size;
bool uses_barrier;
bool uses_num_work_groups;
/* brw_interpolation_map.c */
void brw_setup_vue_interpolation(struct brw_vue_map *vue_map,
struct nir_shader *nir,
- struct brw_wm_prog_data *prog_data,
- const struct gen_device_info *devinfo);
+ struct brw_wm_prog_data *prog_data);
enum shader_dispatch_mode {
DISPATCH_MODE_4X1_SINGLE = 0,
DISPATCH_MODE_4X2_DUAL_INSTANCE = 1,
DISPATCH_MODE_4X2_DUAL_OBJECT = 2,
DISPATCH_MODE_SIMD8 = 3,
+
+ DISPATCH_MODE_TCS_SINGLE_PATCH = 0,
+ DISPATCH_MODE_TCS_8_PATCH = 2,
};
/**
{
struct brw_vue_prog_data base;
+ /** Should the non-SINGLE_PATCH payload provide primitive ID? */
+ bool include_primitive_id;
+
/** Number vertices in output patch */
int instances;
};
DEFINE_PROG_DATA_DOWNCAST(sf)
#undef DEFINE_PROG_DATA_DOWNCAST
+struct brw_compile_stats {
+ uint32_t dispatch_width; /**< 0 for vec4 */
+ uint32_t instructions;
+ uint32_t loops;
+ uint32_t cycles;
+ uint32_t spills;
+ uint32_t fills;
+};
+
/** @} */
struct brw_compiler *
unsigned
brw_prog_key_size(gl_shader_stage stage);
+void
+brw_prog_key_set_id(union brw_any_prog_key *key, gl_shader_stage, unsigned id);
+
/**
* Compile a vertex shader.
*
void *mem_ctx,
const struct brw_vs_prog_key *key,
struct brw_vs_prog_data *prog_data,
- const struct nir_shader *shader,
+ struct nir_shader *shader,
int shader_time_index,
+ struct brw_compile_stats *stats,
char **error_str);
/**
void *mem_ctx,
const struct brw_tcs_prog_key *key,
struct brw_tcs_prog_data *prog_data,
- const struct nir_shader *nir,
+ struct nir_shader *nir,
int shader_time_index,
+ struct brw_compile_stats *stats,
char **error_str);
/**
const struct brw_tes_prog_key *key,
const struct brw_vue_map *input_vue_map,
struct brw_tes_prog_data *prog_data,
- const struct nir_shader *shader,
- struct gl_program *prog,
+ struct nir_shader *shader,
int shader_time_index,
+ struct brw_compile_stats *stats,
char **error_str);
/**
void *mem_ctx,
const struct brw_gs_prog_key *key,
struct brw_gs_prog_data *prog_data,
- const struct nir_shader *shader,
+ struct nir_shader *shader,
struct gl_program *prog,
int shader_time_index,
+ struct brw_compile_stats *stats,
char **error_str);
/**
void *mem_ctx,
const struct brw_wm_prog_key *key,
struct brw_wm_prog_data *prog_data,
- const struct nir_shader *shader,
- struct gl_program *prog,
+ struct nir_shader *shader,
int shader_time_index8,
int shader_time_index16,
int shader_time_index32,
bool allow_spilling,
bool use_rep_send, struct brw_vue_map *vue_map,
+ struct brw_compile_stats *stats, /**< Array of three stats */
char **error_str);
/**
struct brw_cs_prog_data *prog_data,
const struct nir_shader *shader,
int shader_time_index,
+ struct brw_compile_stats *stats,
char **error_str);
+void brw_debug_key_recompile(const struct brw_compiler *c, void *log,
+ gl_shader_stage stage,
+ const struct brw_base_prog_key *old_key,
+ const struct brw_base_prog_key *key);
+
static inline uint32_t
encode_slm_size(unsigned gen, uint32_t bytes)
{
* '2^n - 1' for some n.
*/
static inline bool
-brw_stage_has_packed_dispatch(MAYBE_UNUSED const struct gen_device_info *devinfo,
+brw_stage_has_packed_dispatch(ASSERTED const struct gen_device_info *devinfo,
gl_shader_stage stage,
const struct brw_stage_prog_data *prog_data)
{
* to do a full test run with brw_fs_test_dispatch_packing() hooked up to
* the NIR front-end before changing this assertion.
*/
- assert(devinfo->gen <= 11);
+ assert(devinfo->gen <= 12);
switch (stage) {
case MESA_SHADER_FRAGMENT: {
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