struct brw_reg src1, \
struct brw_reg src2);
-#define ROUND(OP) \
-void brw_##OP(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0);
-
ALU1(MOV)
ALU2(SEL)
ALU1(NOT)
ALU2(MUL)
ALU1(FRC)
ALU1(RNDD)
+ALU1(RNDE)
+ALU1(RNDZ)
ALU2(MAC)
ALU2(MACH)
ALU1(LZD)
ALU2(SUBB)
ALU2(MAC)
-ROUND(RNDZ)
-ROUND(RNDE)
-
#undef ALU1
#undef ALU2
#undef ALU3
-#undef ROUND
/* Helpers for SEND instruction:
SET_BITS(brw_mdc_cmask(num_channels), 3, 0) |
SET_BITS(simd_mode, 5, 4);
- return brw_dp_desc(devinfo, BRW_BTI_STATELESS, msg_type, msg_control);
+ return brw_dp_desc(devinfo, GEN8_BTI_STATELESS_NON_COHERENT,
+ msg_type, msg_control);
}
/**
SET_BITS(brw_mdc_a64_ds(bit_size / 8), 3, 2) |
SET_BITS(exec_size == 16, 4, 4);
- return brw_dp_desc(devinfo, BRW_BTI_STATELESS, msg_type, msg_control);
+ return brw_dp_desc(devinfo, GEN8_BTI_STATELESS_NON_COHERENT,
+ msg_type, msg_control);
}
static inline uint32_t
SET_BITS(bit_size == 64, 4, 4) |
SET_BITS(response_expected, 5, 5);
- return brw_dp_desc(devinfo, BRW_BTI_STATELESS, msg_type, msg_control);
+ return brw_dp_desc(devinfo, GEN8_BTI_STATELESS_NON_COHERENT,
+ msg_type, msg_control);
}
static inline uint32_t
SET_BITS(atomic_op, 1, 0) |
SET_BITS(response_expected, 5, 5);
- return brw_dp_desc(devinfo, BRW_BTI_STATELESS, msg_type, msg_control);
+ return brw_dp_desc(devinfo, GEN8_BTI_STATELESS_NON_COHERENT,
+ msg_type, msg_control);
}
static inline uint32_t
brw_inst *brw_BREAK(struct brw_codegen *p);
brw_inst *brw_CONT(struct brw_codegen *p);
-brw_inst *gen6_HALT(struct brw_codegen *p);
+brw_inst *brw_HALT(struct brw_codegen *p);
/* Forward jumps:
*/
struct brw_reg dst,
struct brw_reg src,
enum opcode send_op,
- bool stall,
+ enum brw_message_target sfid,
+ bool commit_enable,
unsigned bti);
void