void setup_payload_interference(struct ra_graph *g, int payload_reg_count,
int first_payload_node);
int choose_spill_reg(struct ra_graph *g);
- void spill_reg(int spill_reg);
+ void spill_reg(unsigned spill_reg);
void split_virtual_grfs();
bool compact_virtual_grfs();
void assign_constant_locations();
void lower_uniform_pull_constant_loads();
bool lower_load_payload();
bool lower_pack();
- bool lower_conversions();
+ bool lower_regioning();
bool lower_logical_sends();
bool lower_integer_multiplication();
bool lower_minmax();
nir_intrinsic_instr *instr);
void nir_emit_cs_intrinsic(const brw::fs_builder &bld,
nir_intrinsic_instr *instr);
+ fs_reg get_nir_image_intrinsic_image(const brw::fs_builder &bld,
+ nir_intrinsic_instr *instr);
+ fs_reg get_nir_ssbo_intrinsic_index(const brw::fs_builder &bld,
+ nir_intrinsic_instr *instr);
void nir_emit_intrinsic(const brw::fs_builder &bld,
nir_intrinsic_instr *instr);
void nir_emit_tes_intrinsic(const brw::fs_builder &bld,
nir_intrinsic_instr *instr);
void nir_emit_ssbo_atomic(const brw::fs_builder &bld,
int op, nir_intrinsic_instr *instr);
+ void nir_emit_ssbo_atomic_float(const brw::fs_builder &bld,
+ int op, nir_intrinsic_instr *instr);
void nir_emit_shared_atomic(const brw::fs_builder &bld,
int op, nir_intrinsic_instr *instr);
+ void nir_emit_shared_atomic_float(const brw::fs_builder &bld,
+ int op, nir_intrinsic_instr *instr);
void nir_emit_texture(const brw::fs_builder &bld,
nir_tex_instr *instr);
void nir_emit_jump(const brw::fs_builder &bld,
fs_reg get_nir_src(const nir_src &src);
fs_reg get_nir_src_imm(const nir_src &src);
fs_reg get_nir_dest(const nir_dest &dest);
- fs_reg get_nir_image_deref(nir_deref_instr *deref);
fs_reg get_indirect_offset(nir_intrinsic_instr *instr);
void emit_percomp(const brw::fs_builder &bld, const fs_inst &inst,
unsigned wr_mask);
struct brw_reg dst,
struct brw_reg x,
struct brw_reg y);
- void generate_unpack_half_2x16_split(fs_inst *inst,
- struct brw_reg dst,
- struct brw_reg src);
void generate_shader_time_add(fs_inst *inst,
struct brw_reg payload,
struct brw_reg src,
struct brw_reg idx);
+ void generate_quad_swizzle(const fs_inst *inst,
+ struct brw_reg dst, struct brw_reg src,
+ unsigned swiz);
+
bool patch_discard_jumps_to_fb_writes();
const struct brw_compiler *compiler;
return fs_reg(retype(brw_vec8_grf(regs[0], 0), type));
}
}
+
+ bool
+ lower_src_modifiers(fs_visitor *v, bblock_t *block, fs_inst *inst, unsigned i);
}
void shuffle_from_32bit_read(const brw::fs_builder &bld,
fs_reg setup_imm_df(const brw::fs_builder &bld,
double v);
+fs_reg setup_imm_b(const brw::fs_builder &bld,
+ int8_t v);
+
+fs_reg setup_imm_ub(const brw::fs_builder &bld,
+ uint8_t v);
+
enum brw_barycentric_mode brw_barycentric_mode(enum glsl_interp_mode mode,
nir_intrinsic_op op);