struct weight_vector_type {
weight_vector_type() : v(NULL), size(0) {}
- weight_vector_type(unsigned n) :
- v(new vector_type[DIV_ROUND_UP(n, vector_width)]()),
- size(n) {}
+ weight_vector_type(unsigned n) : v(alloc(n)), size(n) {}
weight_vector_type(const weight_vector_type &u) :
- v(new vector_type[DIV_ROUND_UP(u.size, vector_width)]()),
- size(u.size)
+ v(alloc(u.size)), size(u.size)
{
memcpy(v, u.v,
DIV_ROUND_UP(u.size, vector_width) * sizeof(vector_type));
~weight_vector_type()
{
- delete[] v;
+ free(v);
}
weight_vector_type &
vector_type *v;
unsigned size;
+
+ private:
+ static vector_type *
+ alloc(unsigned n)
+ {
+ const unsigned align = MAX2(sizeof(void *), __alignof__(vector_type));
+ const unsigned size = DIV_ROUND_UP(n, vector_width) * sizeof(vector_type);
+ void *p;
+ if (posix_memalign(&p, align, size))
+ return NULL;
+ memset(p, 0, size);
+ return reinterpret_cast<vector_type *>(p);
+ }
};
/**
for (unsigned reg = 0; reg < 2; reg++)
constrained[p.atom_of_reg(reg)] = true;
+ /* At Intel Broadwell PRM, vol 07, section "Instruction Set Reference",
+ * subsection "EUISA Instructions", Send Message (page 990):
+ *
+ * "r127 must not be used for return address when there is a src and
+ * dest overlap in send instruction."
+ *
+ * Register allocation ensures that, so don't move 127 around to avoid
+ * breaking that property.
+ */
+ if (v->devinfo->gen >= 8)
+ constrained[p.atom_of_reg(127)] = true;
+
foreach_block_and_inst(block, fs_inst, inst, v->cfg) {
/* Assume that anything referenced via fixed GRFs is baked into the
* hardware's fixed-function logic and may be unsafe to move around.