latency = 50;
break;
- case SHADER_OPCODE_UNTYPED_ATOMIC:
+ case VEC4_OPCODE_UNTYPED_ATOMIC:
/* See GEN7_DATAPORT_DC_UNTYPED_ATOMIC_OP */
latency = 14000;
break;
- case SHADER_OPCODE_UNTYPED_SURFACE_READ:
- case SHADER_OPCODE_UNTYPED_SURFACE_WRITE:
+ case VEC4_OPCODE_UNTYPED_SURFACE_READ:
+ case VEC4_OPCODE_UNTYPED_SURFACE_WRITE:
/* See also GEN7_DATAPORT_DC_UNTYPED_SURFACE_READ */
latency = is_haswell ? 300 : 600;
break;
latency = 14000;
break;
+ case GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE:
+ /* completely fabricated number */
+ latency = 600;
+ break;
+
default:
unreachable("Unknown render cache message");
}
case GEN7_SFID_DATAPORT_DATA_CACHE:
switch ((inst->desc >> 14) & 0x1f) {
+ case GEN7_DATAPORT_DC_DWORD_SCATTERED_READ:
+ case GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE:
case HSW_DATAPORT_DC_PORT0_BYTE_SCATTERED_READ:
case HSW_DATAPORT_DC_PORT0_BYTE_SCATTERED_WRITE:
/* We have no data for this but assume it's roughly the same as
}
if (inst->mlen > 0 && inst->base_mrf != -1) {
- for (int i = 0; i < v->implied_mrf_writes(inst); i++) {
+ for (unsigned i = 0; i < inst->implied_mrf_writes(); i++) {
add_dep(last_mrf_write[inst->base_mrf + i], n);
last_mrf_write[inst->base_mrf + i] = n;
}
}
if (inst->mlen > 0 && inst->base_mrf != -1) {
- for (int i = 0; i < v->implied_mrf_writes(inst); i++) {
+ for (unsigned i = 0; i < inst->implied_mrf_writes(); i++) {
last_mrf_write[inst->base_mrf + i] = n;
}
}