intel/fs: Only propagate saturation if exec_size is the same.

[mesa.git] / src / intel / compiler / brw_shader.h

diff --git a/src/intel/compiler/brw_shader.h b/src/intel/compiler/brw_shader.h
index e1d598b87819c94921e3cc65a865529064d5c70d..61b5cd6fad38ba4449829aa9dba40391e9abbd6c 100644 (file)
--- a/src/intel/compiler/brw_shader.h
+++ b/src/intel/compiler/brw_shader.h
@@ -156,8 +156,11 @@ struct backend_instruction {
 
    uint32_t offset; /**< spill/unspill offset or texture offset bitfield */
    uint8_t mlen; /**< SEND message length */
+   uint8_t ex_mlen; /**< SENDS extended message length */
    int8_t base_mrf; /**< First MRF in the SEND message, if mlen is nonzero. */
    uint8_t target; /**< MRT target. */
+   uint8_t sfid; /**< SFID for SEND instructions */
+   uint32_t desc; /**< SEND[S] message descriptor immediate */
    unsigned size_written; /**< Data written to the destination register in bytes. */
 
    enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */
@@ -170,6 +173,9 @@ struct backend_instruction {
    bool no_dd_check:1;
    bool saturate:1;
    bool shadow_compare:1;
+   bool check_tdr:1; /**< Only valid for SEND; turns it into a SENDC */
+   bool send_has_side_effects:1; /**< Only valid for SHADER_OPCODE_SEND */
+   bool send_is_volatile:1; /**< Only valid for SHADER_OPCODE_SEND */
    bool eot:1;
 
    /* Chooses which flag subregister (f0.0 to f1.1) is used for conditional
@@ -237,8 +243,7 @@ public:
    virtual void invalidate_live_intervals() = 0;
 };
 
-bool brw_texture_offset(int *offsets,
-                        unsigned num_components,
+bool brw_texture_offset(const nir_tex_instr *tex, unsigned src,
                         uint32_t *offset_bits);
 
 #else