}
bool
-vec4_instruction::is_send_from_grf()
+vec4_instruction::is_send_from_grf() const
{
switch (opcode) {
case SHADER_OPCODE_SHADER_TIME_ADD:
}
void
-vec4_visitor::dump_instruction(backend_instruction *be_inst)
+vec4_visitor::dump_instruction(const backend_instruction *be_inst) const
{
dump_instruction(be_inst, stderr);
}
void
-vec4_visitor::dump_instruction(backend_instruction *be_inst, FILE *file)
+vec4_visitor::dump_instruction(const backend_instruction *be_inst, FILE *file) const
{
- vec4_instruction *inst = (vec4_instruction *)be_inst;
+ const vec4_instruction *inst = (const vec4_instruction *)be_inst;
if (inst->predicate) {
fprintf(file, "(%cf%d.%d%s) ",
prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs;
fs_generator g(compiler, log_data, mem_ctx,
- &prog_data->base.base, v.shader_stats,
- v.runtime_check_aads_emit, MESA_SHADER_VERTEX);
+ &prog_data->base.base, v.runtime_check_aads_emit,
+ MESA_SHADER_VERTEX);
if (INTEL_DEBUG & DEBUG_VS) {
const char *debug_name =
ralloc_asprintf(mem_ctx, "%s vertex shader %s",
g.enable_debug(debug_name);
}
- g.generate_code(v.cfg, 8, stats);
+ g.generate_code(v.cfg, 8, v.shader_stats,
+ v.performance_analysis.require(), stats);
assembly = g.get_assembly();
}
assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx,
shader, &prog_data->base,
- v.cfg, stats);
+ v.cfg,
+ v.performance_analysis.require(),
+ stats);
}
return assembly;