intel/fs,vec4: Clean up a repeated pattern with SSBOs

[mesa.git] / src / intel / compiler / brw_vec4.h

diff --git a/src/intel/compiler/brw_vec4.h b/src/intel/compiler/brw_vec4.h
index a84048d8c6a7c6a874b90d488740218d4db0166a..8ef0b5319b0a429cbe7503acea826dca4418acb7 100644 (file)
--- a/src/intel/compiler/brw_vec4.h
+++ b/src/intel/compiler/brw_vec4.h
@@ -28,6 +28,7 @@
 
 #ifdef __cplusplus
 #include "brw_ir_vec4.h"
+#include "brw_vec4_builder.h"
 #endif
 
 #include "compiler/glsl/ir.h"
@@ -44,8 +45,7 @@ brw_vec4_generate_assembly(const struct brw_compiler *compiler,
                            void *mem_ctx,
                            const nir_shader *nir,
                            struct brw_vue_prog_data *prog_data,
-                           const struct cfg_t *cfg,
-                           unsigned *out_assembly_size);
+                           const struct cfg_t *cfg);
 
 #ifdef __cplusplus
 } /* extern "C" */
@@ -71,7 +71,6 @@ public:
                void *mem_ctx,
                 bool no_spills,
                 int shader_time_index);
-   virtual ~vec4_visitor();
 
    dst_reg dst_null_f()
    {
@@ -159,6 +158,7 @@ public:
    void opt_set_dependency_control();
    void opt_schedule_instructions();
    void convert_to_hw_regs();
+   void fixup_3src_null_dest();
 
    bool is_supported_64bit_region(vec4_instruction *inst, unsigned arg);
    bool lower_simd_width();
@@ -321,12 +321,8 @@ public:
 
    bool optimize_predicate(nir_alu_instr *instr, enum brw_predicate *predicate);
 
-   void emit_conversion_from_double(dst_reg dst, src_reg src, bool saturate,
-                                    brw_reg_type single_type);
-   void emit_conversion_to_double(dst_reg dst, src_reg src, bool saturate,
-                                  brw_reg_type single_type);
-
-   src_reg setup_imm_df(double v);
+   void emit_conversion_from_double(dst_reg dst, src_reg src, bool saturate);
+   void emit_conversion_to_double(dst_reg dst, src_reg src, bool saturate);
 
    vec4_instruction *shuffle_64bit_data(dst_reg dst, src_reg src,
                                         bool for_write,
@@ -335,8 +331,6 @@ public:
 
    virtual void emit_nir_code();
    virtual void nir_setup_uniforms();
-   virtual void nir_setup_system_value_intrinsic(nir_intrinsic_instr *instr);
-   virtual void nir_setup_system_values();
    virtual void nir_emit_impl(nir_function_impl *impl);
    virtual void nir_emit_cf_list(exec_list *list);
    virtual void nir_emit_if(nir_if *if_stmt);
@@ -344,6 +338,7 @@ public:
    virtual void nir_emit_block(nir_block *block);
    virtual void nir_emit_instr(nir_instr *instr);
    virtual void nir_emit_load_const(nir_load_const_instr *instr);
+   src_reg get_nir_ssbo_intrinsic_index(nir_intrinsic_instr *instr);
    virtual void nir_emit_intrinsic(nir_intrinsic_instr *instr);
    virtual void nir_emit_alu(nir_alu_instr *instr);
    virtual void nir_emit_jump(nir_jump_instr *instr);
@@ -360,18 +355,14 @@ public:
                        unsigned num_components = 4);
    src_reg get_nir_src(const nir_src &src,
                        unsigned num_components = 4);
+   src_reg get_nir_src_imm(const nir_src &src);
    src_reg get_indirect_offset(nir_intrinsic_instr *instr);
 
-   virtual dst_reg *make_reg_for_system_value(int location) = 0;
-
    dst_reg *nir_locals;
    dst_reg *nir_ssa_values;
-   dst_reg *nir_system_values;
 
 protected:
    void emit_vertex();
-   void lower_attributes_to_hw_regs(const int *attribute_map,
-                                    bool interleaved);
    void setup_payload_interference(struct ra_graph *g, int first_payload_node,
                                    int reg_node_count);
    virtual void setup_payload() = 0;