inst->src[arg] = value;
return true;
+ case VEC4_OPCODE_UNTYPED_ATOMIC:
+ if (arg == 1) {
+ inst->src[arg] = value;
+ return true;
+ }
+ break;
+
case SHADER_OPCODE_POW:
case SHADER_OPCODE_INT_QUOTIENT:
case SHADER_OPCODE_INT_REMAINDER:
is_align1_opcode(unsigned opcode)
{
switch (opcode) {
- case VEC4_OPCODE_FROM_DOUBLE:
+ case VEC4_OPCODE_DOUBLE_TO_F32:
+ case VEC4_OPCODE_DOUBLE_TO_D32:
+ case VEC4_OPCODE_DOUBLE_TO_U32:
case VEC4_OPCODE_TO_DOUBLE:
case VEC4_OPCODE_PICK_LOW_32BIT:
case VEC4_OPCODE_PICK_HIGH_32BIT:
return false;
if (has_source_modifiers &&
- inst->opcode == SHADER_OPCODE_GEN4_SCRATCH_WRITE)
+ (inst->opcode == SHADER_OPCODE_GEN4_SCRATCH_WRITE ||
+ inst->opcode == VEC4_OPCODE_PICK_HIGH_32BIT))
return false;
unsigned composed_swizzle = brw_compose_swizzle(inst->src[arg].swizzle,
}
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_INSTRUCTION_DATA_FLOW |
+ DEPENDENCY_INSTRUCTION_DETAIL);
return progress;
}