Added few more stubs so that control reaches to DestroyDevice().

[mesa.git] / src / intel / compiler / brw_vec4_live_variables.cpp

diff --git a/src/intel/compiler/brw_vec4_live_variables.cpp b/src/intel/compiler/brw_vec4_live_variables.cpp
index c2c66f71a33a3d7de812fa7869a85f5bff77ef65..cc3f0a5a3c4b7291f71dc20494ca7daf805bd31c 100644 (file)
--- a/src/intel/compiler/brw_vec4_live_variables.cpp
+++ b/src/intel/compiler/brw_vec4_live_variables.cpp
@@ -215,9 +215,8 @@ vec4_live_variables::compute_start_end()
    }
 }
 
-vec4_live_variables::vec4_live_variables(const simple_allocator &alloc,
-                                         cfg_t *cfg)
-   : alloc(alloc), cfg(cfg)
+vec4_live_variables::vec4_live_variables(const backend_shader *s)
+   : alloc(s->alloc), cfg(s->cfg)
 {
    mem_ctx = ralloc_context(NULL);
 
@@ -255,41 +254,47 @@ vec4_live_variables::~vec4_live_variables()
    ralloc_free(mem_ctx);
 }
 
-/**
- * Computes a conservative start/end of the live intervals for each virtual GRF.
- *
- * We could expose per-channel live intervals to the consumer based on the
- * information we computed in vec4_live_variables, except that our only
- * current user is virtual_grf_interferes().  So we instead union the
- * per-channel ranges into a per-vgrf range for vgrf_start[] and vgrf_end[].
- *
- * We could potentially have virtual_grf_interferes() do the test per-channel,
- * which would let some interesting register allocation occur (particularly on
- * code-generated GLSL sequences from the Cg compiler which does register
- * allocation at the GLSL level and thus reuses components of the variable
- * with distinct lifetimes).  But right now the complexity of doing so doesn't
- * seem worth it, since having virtual_grf_interferes() be cheap is important
- * for register allocation performance.
- */
-void
-vec4_visitor::calculate_live_intervals()
+static bool
+check_register_live_range(const vec4_live_variables *live, int ip,
+                          unsigned var, unsigned n)
 {
-   if (this->live_intervals)
-      return;
-
-   /* Now, extend those intervals using our analysis of control flow.
-    *
-    * The control flow-aware analysis was done at a channel level, while at
-    * this point we're distilling it down to vgrfs.
-    */
-   this->live_intervals = new(mem_ctx) vec4_live_variables(alloc, cfg);
+   for (unsigned j = 0; j < n; j += 4) {
+      if (var + j >= unsigned(live->num_vars) ||
+          live->start[var + j] > ip || live->end[var + j] < ip)
+         return false;
+   }
+
+   return true;
 }
 
-void
-vec4_visitor::invalidate_live_intervals()
+bool
+vec4_live_variables::validate(const backend_shader *s) const
 {
-   ralloc_free(live_intervals);
-   live_intervals = NULL;
+   unsigned ip = 0;
+
+   foreach_block_and_inst(block, vec4_instruction, inst, s->cfg) {
+      for (unsigned c = 0; c < 4; c++) {
+         if (inst->dst.writemask & (1 << c)) {
+            for (unsigned i = 0; i < 3; i++) {
+               if (inst->src[i].file == VGRF &&
+                   !check_register_live_range(this, ip,
+                                              var_from_reg(alloc, inst->src[i], c),
+                                              regs_read(inst, i)))
+                  return false;
+            }
+
+            if (inst->dst.file == VGRF &&
+                !check_register_live_range(this, ip,
+                                           var_from_reg(alloc, inst->dst, c),
+                                           regs_written(inst)))
+               return false;
+         }
+      }
+
+      ip++;
+   }
+
+   return true;
 }
 
 int