nir: Add bit_count to lower_int64 pass

[mesa.git] / src / intel / compiler / brw_vec4_tcs.cpp

diff --git a/src/intel/compiler/brw_vec4_tcs.cpp b/src/intel/compiler/brw_vec4_tcs.cpp
index 852c5a9865cd3425ae6365406a777b2f4d575aec..e9a6880cfbe46f21cb4c5a4cb080b75a5b3d698d 100644 (file)
--- a/src/intel/compiler/brw_vec4_tcs.cpp
+++ b/src/intel/compiler/brw_vec4_tcs.cpp
@@ -394,7 +394,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
 
    if (compiler->use_tcs_8_patch &&
        nir->info.tess.tcs_vertices_out <= (devinfo->gen >= 12 ? 32 : 16) &&
-       2 + has_primitive_id + key->input_vertices <= 31) {
+       2 + has_primitive_id + key->input_vertices <= (devinfo->gen >= 12 ? 63 : 31)) {
       /* 3DSTATE_HS imposes two constraints on using 8_PATCH mode. First, the
        * "Instance" field limits the number of output vertices to [1, 16] on
        * gen11 and below, or [1, 32] on gen12 and above. Secondly, the