radv: always initialize HTILE when the src layout is UNDEFINED
[mesa.git] / src / intel / compiler / meson.build
index 2124278cc04f8d45839381b525b0b481f434bd81..21614c5baf99a424a02a84e5ee9116931629418e 100644 (file)
@@ -55,15 +55,13 @@ libintel_compiler_files = files(
   'brw_fs.h',
   'brw_fs_live_variables.cpp',
   'brw_fs_live_variables.h',
-  'brw_fs_lower_conversions.cpp',
   'brw_fs_lower_pack.cpp',
+  'brw_fs_lower_regioning.cpp',
   'brw_fs_nir.cpp',
   'brw_fs_reg_allocate.cpp',
   'brw_fs_register_coalesce.cpp',
   'brw_fs_saturate_propagation.cpp',
   'brw_fs_sel_peephole.cpp',
-  'brw_fs_surface_builder.cpp',
-  'brw_fs_surface_builder.h',
   'brw_fs_validate.cpp',
   'brw_fs_visitor.cpp',
   'brw_inst.h',
@@ -146,7 +144,8 @@ if with_tests
   foreach t : ['fs_cmod_propagation', 'fs_copy_propagation',
                'fs_saturate_propagation', 'vf_float_conversions',
                'vec4_register_coalesce', 'vec4_copy_propagation',
-               'vec4_cmod_propagation', 'eu_compact', 'eu_validate']
+               'vec4_cmod_propagation', 'vec4_dead_code_eliminate',
+               'eu_compact', 'eu_validate']
     test(
       t,
       executable(