i965/glk: Add l3 banks count for 2x6 configuration
[mesa.git] / src / intel / dev / gen_device_info.c
index f7cb94f17951c0061928254f224d7a9383652c24..8e971329892d4b825b9d3b69b4c35f39daa54026 100644 (file)
@@ -732,10 +732,10 @@ static const struct gen_device_info gen_device_info_glk = {
    .l3_banks = 2,
 };
 
-/*TODO: Initialize l3_banks when we know the number. */
 static const struct gen_device_info gen_device_info_glk_2x6 = {
    GEN9_LP_FEATURES_2X6,
    .is_geminilake = true,
+   .l3_banks = 2,
 };
 
 static const struct gen_device_info gen_device_info_cfl_gt1 = {
@@ -1034,6 +1034,7 @@ gen_device_info_update_from_topology(struct gen_device_info *devinfo,
       }
       n_subslices += devinfo->num_subslices[s];
    }
+   assert(n_subslices > 0);
 
    uint32_t eu_mask_len =
       topology->eu_stride * topology->max_subslices * topology->max_slices;
@@ -1044,11 +1045,7 @@ gen_device_info_update_from_topology(struct gen_device_info *devinfo,
    for (int b = 0; b < eu_mask_len; b++)
       n_eus += __builtin_popcount(devinfo->eu_masks[b]);
 
-   /* We expect the total number of EUs to be uniformly distributed throughout
-    * the subslices.
-    */
-   assert((n_eus % n_subslices) == 0);
-   devinfo->num_eu_per_subslice = n_eus / n_subslices;
+   devinfo->num_eu_per_subslice = DIV_ROUND_UP(n_eus, n_subslices);
 }
 
 bool