intel/compiler: detect if atomic load store operations are used

[mesa.git] / src / intel / dev / gen_device_info.h

diff --git a/src/intel/dev/gen_device_info.h b/src/intel/dev/gen_device_info.h
index 57f1495a1e6ef3e55e5a2331108802561cc2dcc9..73538160b54773fb25854697974ce91693485c5b 100644 (file)
--- a/src/intel/dev/gen_device_info.h
+++ b/src/intel/dev/gen_device_info.h
@@ -39,6 +39,7 @@ struct drm_i915_query_topology_info;
 #define GEN_DEVICE_MAX_SLICES           (6)  /* Maximum on gen10 */
 #define GEN_DEVICE_MAX_SUBSLICES        (8)  /* Maximum on gen11 */
 #define GEN_DEVICE_MAX_EUS_PER_SUBSLICE (10) /* Maximum on Haswell */
+#define GEN_DEVICE_MAX_PIXEL_PIPES      (2)  /* Maximum on gen11 */
 
 /**
  * Intel hardware information and quirks
@@ -61,6 +62,7 @@ struct gen_device_info
    bool is_geminilake;
    bool is_coffeelake;
    bool is_cannonlake;
+   bool is_elkhartlake;
 
    bool has_hiz_and_separate_stencil;
    bool must_use_separate_stencil;
@@ -68,13 +70,15 @@ struct gen_device_info
    bool has_llc;
 
    bool has_pln;
-   bool has_64bit_types;
+   bool has_64bit_float;
+   bool has_64bit_int;
    bool has_integer_dword_mul;
    bool has_compr4;
    bool has_surface_tile_offset;
    bool supports_simd16_3src;
    bool has_resource_streamer;
    bool disable_ccs_repack;
+   bool has_aux_map;
 
    /**
     * \name Intel hardware quirks
@@ -124,6 +128,11 @@ struct gen_device_info
     */
    unsigned num_subslices[GEN_DEVICE_MAX_SUBSLICES];
 
+   /**
+    * Number of subslices on each pixel pipe (ICL).
+    */
+   unsigned ppipe_subslices[GEN_DEVICE_MAX_PIXEL_PIPES];
+
    /**
     * Upper bound of number of EU per subslice (some SKUs might have just 1 EU
     * fused across all subslices, like 47 EUs, in which case this number won't