intel/genxml: add RPSTAT register for core frequency
[mesa.git] / src / intel / genxml / gen12.xml
index 77fc67098a003d01ed9d93a211be387d10dfc5d1..05d70551aa4423f367056282c9b07b7801c5c3ff 100644 (file)
     <field name="Vertical Line Stride" start="11" end="11" type="uint"/>
     <field name="Tile Mode" start="12" end="13" type="uint">
       <value name="LINEAR" value="0"/>
-      <value name="WMAJOR" value="1"/>
       <value name="XMAJOR" value="2"/>
       <value name="YMAJOR" value="3"/>
     </field>
     </group>
   </instruction>
 
-  <instruction name="3DSTATE_STENCIL_BUFFER" bias="2" length="5" engine="render">
-    <field name="DWord Length" start="0" end="7" type="uint" default="3"/>
+  <instruction name="3DSTATE_STENCIL_BUFFER" bias="2" length="8" engine="render">
+    <field name="DWord Length" start="0" end="7" type="uint" default="6"/>
     <field name="3D Command Sub Opcode" start="16" end="23" type="uint" default="6"/>
     <field name="3D Command Opcode" start="24" end="26" type="uint" default="0"/>
     <field name="Command SubType" start="27" end="28" type="uint" default="3"/>
     <field name="Command Type" start="29" end="31" type="uint" default="3"/>
     <field name="Surface Pitch" start="32" end="48" type="uint"/>
-    <field name="MOCS" start="54" end="60" type="uint"/>
-    <field name="Stencil Buffer Enable" start="63" end="63" type="bool"/>
+    <field name="Corner Texel Mode" start="55" end="55" type="bool"/>
+    <field name="Control Surface Enable" start="56" end="56" type="bool"/>
+    <field name="Stencil Compression Enable" start="57" end="57" type="bool"/>
+    <field name="Null Page Coherency Enable" start="59" end="59" type="bool"/>
+    <field name="Stencil Write Enable" start="60" end="60" type="bool"/>
+    <field name="Surface Type" start="61" end="63" type="uint">
+      <value name="SURFTYPE_2D" value="1"/>
+      <value name="SURFTYPE_CUBE" value="3"/>
+      <value name="SURFTYPE_NULL" value="7"/>
+    </field>
     <field name="Surface Base Address" start="64" end="127" type="address"/>
-    <field name="Surface QPitch" start="128" end="142" type="uint"/>
+    <field name="Width" start="129" end="142" type="uint"/>
+    <field name="Height" start="145" end="158" type="uint"/>
+    <field name="MOCS" start="160" end="166" type="uint"/>
+    <field name="Minimum Array Element" start="168" end="178" type="uint"/>
+    <field name="Depth" start="180" end="190" type="uint"/>
+    <field name="Mip Tail Start LOD" start="218" end="221" type="uint"/>
+    <field name="Tiled Mode" start="222" end="223" type="uint">
+      <value name="NONE" value="0"/>
+      <value name="TILEYF" value="1"/>
+      <value name="TILEYS" value="2"/>
+    </field>
+    <field name="Surface QPitch" start="224" end="238" type="uint"/>
+    <field name="Surf LOD" start="240" end="243" type="uint"/>
+    <field name="Render Target View Extent" start="245" end="255" type="uint"/>
   </instruction>
 
   <instruction name="3DSTATE_STREAMOUT" bias="2" length="5" engine="render">
 
   <instruction name="3DSTATE_WM_DEPTH_STENCIL" bias="2" length="4" engine="render">
     <field name="DWord Length" start="0" end="7" type="uint" default="2"/>
+    <field name="Stencil Reference Value Modify Disable" start="8" end="8" type="bool"/>
+    <field name="Stencil Test Mask Modify Disable" start="9" end="9" type="bool"/>
+    <field name="Stencil Write Mask Modify Disable" start="10" end="10" type="bool"/>
+    <field name="Stencil State Modify Disable" start="11" end="11" type="bool"/>
     <field name="Depth State Modify Disable" start="12" end="12" type="bool"/>
     <field name="3D Command Sub Opcode" start="16" end="23" type="uint" default="78"/>
     <field name="3D Command Opcode" start="24" end="26" type="uint" default="0"/>
     <field name="MA1 Done SS0" start="26" end="26" type="bool"/>
   </register>
 
+  <register name="RPSTAT0" length="1" num="0xa01c">
+    <field name="Previous GT Frequency" start="0" end="8" type="uint"/>
+    <field name="Current GT Frequency" start="23" end="31" type="uint"/>
+  </register>
+
   <register name="SAMPLER_INSTDONE" length="1" num="0xe160">
     <field name="IME Done" start="0" end="0" type="bool"/>
     <field name="PL0 Done" start="1" end="1" type="bool"/>