intel/nir: Allow splitting a single load into up to 32 loads

[mesa.git] / src / intel / genxml / gen5.xml

diff --git a/src/intel/genxml/gen5.xml b/src/intel/genxml/gen5.xml
index 3d1cbcbdecde36556dca948e266bc8a4d11aaa7e..1a5be6172b45289731fe481870c6805ee3f2e2a4 100644 (file)
--- a/src/intel/genxml/gen5.xml
+++ b/src/intel/genxml/gen5.xml
@@ -492,7 +492,7 @@
       <value name="FRONT" value="2"/>
       <value name="BACK" value="3"/>
     </field>
-    <field name="Anti-Aliasing Enable" start="223" end="223" type="bool"/>
+    <field name="Antialiasing Enable" start="223" end="223" type="bool"/>
     <field name="Point Width" start="224" end="234" type="u8.3"/>
     <field name="Point Width Source" start="235" end="235" type="uint">
       <value name="Vertex" value="0"/>