anv: Don't delete fragment shaders that write sample mask

[mesa.git] / src / intel / isl / isl.c

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index b22cd009e83d85e202a3834d8f2a698a2a144a06..7c0d3c4dacd65dbf3ec8b857f4325ca483db4f2f 100644 (file)
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -1848,13 +1848,9 @@ isl_surf_get_ccs_surf(const struct isl_device *dev,
    if (aux_surf->usage & ISL_SURF_USAGE_CCS_BIT)
       return false;
 
-   /* Only multisampled depth buffers with HiZ can have CCS. */
-   if (surf->samples > 1 && !(aux_surf->usage & ISL_SURF_USAGE_HIZ_BIT))
+   if (ISL_DEV_GEN(dev) < 12 && surf->samples > 1)
       return false;
 
-   assert(surf->msaa_layout == ISL_MSAA_LAYOUT_NONE ||
-          surf->msaa_layout == ISL_MSAA_LAYOUT_INTERLEAVED);
-
    /* CCS support does not exist prior to Gen7 */
    if (ISL_DEV_GEN(dev) <= 6)
       return false;
@@ -1862,8 +1858,9 @@ isl_surf_get_ccs_surf(const struct isl_device *dev,
    if (surf->usage & ISL_SURF_USAGE_DISABLE_AUX_BIT)
       return false;
 
-   /* Callers don't yet support this configuration. */
-   if (isl_surf_usage_is_stencil(surf->usage))
+   /* Allow CCS for single-sampled stencil buffers Gen12+. */
+   if (isl_surf_usage_is_stencil(surf->usage) &&
+       (ISL_DEV_GEN(dev) < 12 || surf->samples > 1))
       return false;
 
    /* [TGL+] CCS can only be added to a non-D16-formatted depth buffer if it