/**
* @brief A channel select (also known as texture swizzle) value
*/
-enum isl_channel_select {
+enum PACKED isl_channel_select {
ISL_CHANNEL_SELECT_ZERO = 0,
ISL_CHANNEL_SELECT_ONE = 1,
ISL_CHANNEL_SELECT_RED = 4,
ISL_MSAA_LAYOUT_ARRAY,
};
+typedef enum {
+ ISL_MEMCPY = 0,
+ ISL_MEMCPY_BGRA8,
+ ISL_MEMCPY_STREAMING_LOAD,
+ ISL_MEMCPY_INVALID,
+} isl_memcpy_type;
struct isl_device {
const struct gen_device_info *info;
/**
* Physical extent of the surface's base level, in units of physical
- * surface samples and aligned to the format's compression block.
+ * surface samples.
*
* Consider isl_dim_layout as an operator that transforms a logical surface
* layout to a physical surface layout. Then
*/
enum isl_format format;
+ /**
+ * The swizzle to use in the surface state
+ */
+ struct isl_swizzle swizzle;
+
uint32_t stride_B;
};
isl_format_has_sint_channel(fmt);
}
+bool isl_format_has_color_component(enum isl_format fmt,
+ int component) ATTRIBUTE_CONST;
+
unsigned isl_format_get_num_channels(enum isl_format fmt);
uint32_t isl_format_get_depth_format(enum isl_format fmt, bool has_stencil);
fmtl->bd * surf->image_alignment_el.d);
}
+/**
+ * Logical extent of level 0 in units of surface elements.
+ */
+static inline struct isl_extent4d
+isl_surf_get_logical_level0_el(const struct isl_surf *surf)
+{
+ const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format);
+
+ return isl_extent4d(DIV_ROUND_UP(surf->logical_level0_px.w, fmtl->bw),
+ DIV_ROUND_UP(surf->logical_level0_px.h, fmtl->bh),
+ DIV_ROUND_UP(surf->logical_level0_px.d, fmtl->bd),
+ surf->logical_level0_px.a);
+}
+
+/**
+ * Physical extent of level 0 in units of surface elements.
+ */
+static inline struct isl_extent4d
+isl_surf_get_phys_level0_el(const struct isl_surf *surf)
+{
+ const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format);
+
+ return isl_extent4d(DIV_ROUND_UP(surf->phys_level0_sa.w, fmtl->bw),
+ DIV_ROUND_UP(surf->phys_level0_sa.h, fmtl->bh),
+ DIV_ROUND_UP(surf->phys_level0_sa.d, fmtl->bd),
+ surf->phys_level0_sa.a);
+}
+
/**
* Pitch between vertically adjacent surface elements, in bytes.
*/
isl_surf_get_depth_format(const struct isl_device *dev,
const struct isl_surf *surf);
+/**
+ * @brief performs a copy from linear to tiled surface
+ *
+ */
+void
+isl_memcpy_linear_to_tiled(uint32_t xt1, uint32_t xt2,
+ uint32_t yt1, uint32_t yt2,
+ char *dst, const char *src,
+ uint32_t dst_pitch, int32_t src_pitch,
+ bool has_swizzling,
+ enum isl_tiling tiling,
+ isl_memcpy_type copy_type);
+
+/**
+ * @brief performs a copy from tiled to linear surface
+ *
+ */
+void
+isl_memcpy_tiled_to_linear(uint32_t xt1, uint32_t xt2,
+ uint32_t yt1, uint32_t yt2,
+ char *dst, const char *src,
+ int32_t dst_pitch, uint32_t src_pitch,
+ bool has_swizzling,
+ enum isl_tiling tiling,
+ isl_memcpy_type copy_type);
+
#ifdef __cplusplus
}
#endif