*
* Drawing with or without aux enabled may implicitly cause the surface to
* transition between these states. There are also four types of auxiliary
- * compression operations which cause an explicit transition:
- *
- * 1) Fast Clear: This operation writes the magic "clear" value to the
- * auxiliary surface. This operation will safely transition any slice
- * of a surface from any state to the clear state so long as the entire
- * slice is fast cleared at once. A fast clear that only covers part of
- * a slice of a surface is called a partial fast clear.
- *
- * 2) Full Resolve: This operation combines the auxiliary surface data
- * with the primary surface data and writes the result to the primary.
- * For HiZ, the docs call this a depth resolve. For CCS, the hardware
- * full resolve operation does both a full resolve and an ambiguate so
- * it actually takes you all the way to the pass-through state.
- *
- * 3) Partial Resolve: This operation considers blocks which are in the
- * "clear" state and writes the clear value directly into the primary or
- * auxiliary surface. Once this operation completes, the surface is
- * still compressed but no longer references the clear color. This
- * operation is only available for CCS.
- *
- * 4) Ambiguate: This operation throws away the current auxiliary data and
- * replaces it with the magic pass-through value. If an ambiguate
- * operation is performed when the primary surface does not contain 100%
- * of the data, data will be lost. This operation is only implemented
- * in hardware for depth where it is called a HiZ resolve.
+ * compression operations which cause an explicit transition which are
+ * described by the isl_aux_op enum below.
*
* Not all operations are valid or useful in all states. The diagram below
* contains a complete description of the states and all valid and useful
ISL_AUX_STATE_AUX_INVALID,
};
+/**
+ * Enum which describes explicit aux transition operations.
+ */
+enum isl_aux_op {
+ ISL_AUX_OP_NONE,
+
+ /** Fast Clear
+ *
+ * This operation writes the magic "clear" value to the auxiliary surface.
+ * This operation will safely transition any slice of a surface from any
+ * state to the clear state so long as the entire slice is fast cleared at
+ * once. A fast clear that only covers part of a slice of a surface is
+ * called a partial fast clear.
+ */
+ ISL_AUX_OP_FAST_CLEAR,
+
+ /** Full Resolve
+ *
+ * This operation combines the auxiliary surface data with the primary
+ * surface data and writes the result to the primary. For HiZ, the docs
+ * call this a depth resolve. For CCS, the hardware full resolve operation
+ * does both a full resolve and an ambiguate so it actually takes you all
+ * the way to the pass-through state.
+ */
+ ISL_AUX_OP_FULL_RESOLVE,
+
+ /** Partial Resolve
+ *
+ * This operation considers blocks which are in the "clear" state and
+ * writes the clear value directly into the primary or auxiliary surface.
+ * Once this operation completes, the surface is still compressed but no
+ * longer references the clear color. This operation is only available
+ * for CCS_E.
+ */
+ ISL_AUX_OP_PARTIAL_RESOLVE,
+
+ /** Ambiguate
+ *
+ * This operation throws away the current auxiliary data and replaces it
+ * with the magic pass-through value. If an ambiguate operation is
+ * performed when the primary surface does not contain 100% of the data,
+ * data will be lost. This operation is only implemented in hardware for
+ * depth where it is called a HiZ resolve.
+ */
+ ISL_AUX_OP_AMBIGUATE,
+};
+
/* TODO(chadv): Explain */
enum isl_array_pitch_span {
ISL_ARRAY_PITCH_SPAN_FULL,
uint8_t aux_addr_offset;
/* Rounded up to the nearest dword to simplify GPU memcpy operations. */
+
+ /* size of the state buffer used to store the clear color + extra
+ * additional space used by the hardware */
+ uint8_t clear_color_state_size;
+ uint8_t clear_color_state_offset;
+ /* size of the clear color itself - used to copy it to/from a BO */
uint8_t clear_value_size;
uint8_t clear_value_offset;
} ss;
uint8_t bh; /**< Block height, in pixels */
uint8_t bd; /**< Block depth, in pixels */
- struct {
- struct isl_channel_layout r; /**< Red channel */
- struct isl_channel_layout g; /**< Green channel */
- struct isl_channel_layout b; /**< Blue channel */
- struct isl_channel_layout a; /**< Alpha channel */
- struct isl_channel_layout l; /**< Luminance channel */
- struct isl_channel_layout i; /**< Intensity channel */
- struct isl_channel_layout p; /**< Palette channel */
- } channels;
+ union {
+ struct {
+ struct isl_channel_layout r; /**< Red channel */
+ struct isl_channel_layout g; /**< Green channel */
+ struct isl_channel_layout b; /**< Blue channel */
+ struct isl_channel_layout a; /**< Alpha channel */
+ struct isl_channel_layout l; /**< Luminance channel */
+ struct isl_channel_layout i; /**< Intensity channel */
+ struct isl_channel_layout p; /**< Palette channel */
+ } channels;
+ struct isl_channel_layout channels_array[7];
+ };
enum isl_colorspace colorspace;
enum isl_txc txc;
*/
union isl_color_value clear_color;
+ /**
+ * Send only the clear value address
+ *
+ * If set, we only pass the clear address to the GPU and it will fetch it
+ * from wherever it is.
+ */
+ bool use_clear_address;
+ uint64_t clear_address;
+
/**
* Surface write disables for gen4-5
*/
return &isl_format_layouts[fmt];
}
+bool isl_format_is_valid(enum isl_format);
+
static inline const char * ATTRIBUTE_CONST
isl_format_get_name(enum isl_format fmt)
{
static inline bool
isl_format_is_rgb(enum isl_format fmt)
{
+ if (isl_format_is_yuv(fmt))
+ return false;
return isl_format_layouts[fmt].channels.r.bits > 0 &&
isl_format_layouts[fmt].channels.g.bits > 0 &&
isl_format_layouts[fmt].channels.b.bits > 0 &&
const struct isl_drm_modifier_info * ATTRIBUTE_CONST
isl_drm_modifier_get_info(uint64_t modifier);
+static inline bool
+isl_drm_modifier_has_aux(uint64_t modifier)
+{
+ return isl_drm_modifier_get_info(modifier)->aux_usage != ISL_AUX_USAGE_NONE;
+}
+
+/** Returns the default isl_aux_state for the given modifier.
+ *
+ * If we have a modifier which supports compression, then the auxiliary data
+ * could be in state other than ISL_AUX_STATE_AUX_INVALID. In particular, it
+ * can be in any of the following:
+ *
+ * - ISL_AUX_STATE_CLEAR
+ * - ISL_AUX_STATE_PARTIAL_CLEAR
+ * - ISL_AUX_STATE_COMPRESSED_CLEAR
+ * - ISL_AUX_STATE_COMPRESSED_NO_CLEAR
+ * - ISL_AUX_STATE_RESOLVED
+ * - ISL_AUX_STATE_PASS_THROUGH
+ *
+ * If the modifier does not support fast-clears, then we are guaranteed
+ * that the surface is at least partially resolved and the first three not
+ * possible. We return ISL_AUX_STATE_COMPRESSED_CLEAR if the modifier
+ * supports fast clears and ISL_AUX_STATE_COMPRESSED_NO_CLEAR if it does not
+ * because they are the least common denominator of the set of possible aux
+ * states and will yield a valid interpretation of the aux data.
+ *
+ * For modifiers with no aux support, ISL_AUX_STATE_AUX_INVALID is returned.
+ */
+static inline enum isl_aux_state
+isl_drm_modifier_get_default_aux_state(uint64_t modifier)
+{
+ const struct isl_drm_modifier_info *mod_info =
+ isl_drm_modifier_get_info(modifier);
+
+ if (!mod_info || mod_info->aux_usage == ISL_AUX_USAGE_NONE)
+ return ISL_AUX_STATE_AUX_INVALID;
+
+ assert(mod_info->aux_usage == ISL_AUX_USAGE_CCS_E);
+ return mod_info->supports_clear_color ? ISL_AUX_STATE_COMPRESSED_CLEAR :
+ ISL_AUX_STATE_COMPRESSED_NO_CLEAR;
+}
+
struct isl_extent2d ATTRIBUTE_CONST
isl_get_interleaved_msaa_px_size_sa(uint32_t samples);
return e;
}
+bool isl_color_value_is_zero(union isl_color_value value,
+ enum isl_format format);
+
+bool isl_color_value_is_zero_one(union isl_color_value value,
+ enum isl_format format);
+
+static inline bool
+isl_swizzle_is_identity(struct isl_swizzle swizzle)
+{
+ return swizzle.r == ISL_CHANNEL_SELECT_RED &&
+ swizzle.g == ISL_CHANNEL_SELECT_GREEN &&
+ swizzle.b == ISL_CHANNEL_SELECT_BLUE &&
+ swizzle.a == ISL_CHANNEL_SELECT_ALPHA;
+}
+
+bool
+isl_swizzle_supports_rendering(const struct gen_device_info *devinfo,
+ struct isl_swizzle swizzle);
+
+struct isl_swizzle
+isl_swizzle_compose(struct isl_swizzle first, struct isl_swizzle second);
+struct isl_swizzle
+isl_swizzle_invert(struct isl_swizzle swizzle);
+
#define isl_surf_init(dev, surf, ...) \
isl_surf_init_s((dev), (surf), \
&(struct isl_surf_init_info) { __VA_ARGS__ });
isl_buffer_fill_state_s(const struct isl_device *dev, void *state,
const struct isl_buffer_fill_state_info *restrict info);
+void
+isl_null_fill_state(const struct isl_device *dev, void *state,
+ struct isl_extent3d size);
+
#define isl_emit_depth_stencil_hiz(dev, batch, ...) \
isl_emit_depth_stencil_hiz_s((dev), (batch), \
&(struct isl_depth_stencil_hiz_emit_info) { __VA_ARGS__ })
uint32_t *x_offset_sa,
uint32_t *y_offset_sa);
+/**
+ * Create an isl_surf that represents a particular subimage in the surface.
+ *
+ * The newly created surface will have a single miplevel and array slice. The
+ * surface lives at the returned byte and intratile offsets, in samples.
+ *
+ * It is safe to call this function with surf == image_surf.
+ *
+ * @invariant level < surface levels
+ * @invariant logical_array_layer < logical array length of surface
+ * @invariant logical_z_offset_px < logical depth of surface at level
+ */
+void
+isl_surf_get_image_surf(const struct isl_device *dev,
+ const struct isl_surf *surf,
+ uint32_t level,
+ uint32_t logical_array_layer,
+ uint32_t logical_z_offset_px,
+ struct isl_surf *image_surf,
+ uint32_t *offset_B,
+ uint32_t *x_offset_sa,
+ uint32_t *y_offset_sa);
+
/**
* @brief Calculate the intratile offsets to a surface.
*
projects / mesa.git / blobdiff